Abstract
DC series-parallel power flow controller (SP-PFC) is a highly efficient device to solve the problem of uncontrolled line current in the bipolar DC distribution system. However, its potential in fault current limiting is not fully explored. In this paper, a self-adaptive action strategy (SAAS) and a parameter optimization method of SP-PFC in bipolar DC distribution systems are proposed. Firstly, the common- and different-mode (CDM) equivalent circuits of the bipolar DC distribution system with SP-PFC in different fault stages are established, which avoids the line coupling inductance. Based on this, the influence of different parameters and line coupling inductance on the fault current limiting capability are investigated. It is found that the SP-PFC has the best fault current limiting capability when the capacitance and inductance of filter are inversely proportional. To realize the adaptability of fault current limiting capability under different fault severities, the SAAS of SP-PFC is proposed. The validity of the CDM equivalent circuits and parameter optimization method, and the effectiveness of the SAAS are verified by simulations and experiments.
DUE to the advantages of flexibility and controllability, the voltage source converter (VSC) based DC distribution system technology is widely recognized as a promising one for the grid integration of renewable energy and DC load [
Nowadays, the fault current limiting reactors (CLRs) are often utilized to suppress fault currents. However, integrating a large CLR directly into DC systems can dampen the dynamic characteristics and operational stability, and slow down the isolation speed of DCCB. Its fault current limiting capability rapidly decreases with the increase of inductance value [
The comparison of advantages and disadvantages of different fault current limiting devices are shown in
Fault current limiting device | Impact on system | Fault current limiting capability | Complexity | Cost | Power loss |
---|---|---|---|---|---|
CLR | Dampen dynamic characteristics | Decrease with increase of inductance | Low | Low | Low |
SFCL | No impact | High | Medium | High | High |
SSFCL | No impact | High | High | High | Low |
SSCB | No impact | Medium | High | High | Low |
PFC | No impact | Medium | Low | Low | Low |
For LVDC distribution systems, a combined device of a series-parallel power flow controller (SP-PFC) integrated with a DCCB is proposed in [
An emergency control of SP-PFC is proposed to suppress fault currents. However, the activation of emergency control relies on commands of DC protection system, which will introduce detection delay [
To fill the above research gaps, this paper explores the fault current limiting characteristics of SP-PFC in bipolar DC distribution systems considering line coupling inductance. An SAAS and a parameter optimization method of SP-PFC for fault current limiting are obtained. The contributions of this paper are as follows.
1) The common- and different-mode (CDM) equivalent circuits of the bipolar DC distribution system with SP-PFC in different fault stages are established. The CDM equivalent circuits not only enable the decoupling calculation of fault currents but also quantify the fault current limiting contribution of SP-PFC.
2) Based on the CDM equivalent circuits, the influence of different parameters on the fault current limiting contribution of SP-PFC are rigorously analyzed. Then, a parameter optimization method is proposed to improve the fault current limiting capability of SP-PFC.
3) The SAAS of SP-PFC is proposed to improve the adaptability of its fault current limiting capability in different fault stages, which enhances the fault current limiting efficiency by adaptively adjusting the emergency control activation time based on the fault severity.
The remainder of this paper is organized as follows. Section II derives the fault modulus analysis model of bipolar DC distribution system with SP-PFC. Section III shows analysis of the fault current limiting characteristics and the parameter optimization method of SP-PFC. Section IV investigates the SAAS of SP-PFC. Section V presents the simulation and experimental results. The conclusions are illustrated in Section VI.

Fig. 1 Schematic diagram of bipolar DC distribution system with SP-PFC.

Fig. 2 Different operating modes of SP-PFC.
In Mode 1, although a fault occurs, the emergency control is not triggered. The SP-PFC remains in power flow control mode, managing the line power flow without switching to emergency operating modes.
In Mode 2, the emergency control is activated. Switches Q1 and Q4 are turned on, while switches Q2 and Q3 are blocked. Consequently, the SP-PFC generates a reverse voltage to limit the fault current.
In Mode 3, the bypass control is activated. Switches Q1 and Q3 are turned on. Meanwhile, the emergency control is deactivated.
Taking the unipolar short-circuit fault as an example, the corresponding equivalent circuit is obtained. Within milliseconds after the fault, the VSC can be equated to a capacitor discharge [
(1) |
where Udc and are the initial voltage and equivalent capacitance of VSC, respectively.
This paper focuses on analyzing the fault current limiting stage prior to the tripping of DCCB. According to Mode 1 and Mode 2 of the SP-PFC described above, the fault current limiting stage can be divided into two stages: the natural response stage (stage I) and the emergency control stage (stage II). The equivalent circuit for the bypass control stage is not included in the analysis conducted in this paper.
In stage I, the SP-PFC operates in Mode 1. The output power equals the input power, with the assumption that the switching loss of SP-PFC is ignored. Therefore, the output voltage Vk satisfies:
(2) |
where is the positive line voltage on the input side of the SP-PFC; Rσ is the leakage resistance of the isolation transformer; n is the ratio of the isolation transformer; and If is the line fault current.
According to (2), the expression of the output voltage can obtained as:
(3) |
The frequency-domain equivalent circuit with SP-PFC in stage I is shown in

Fig. 3 Frequency-domain equivalent circuit with SP-PFC in stage I.
In stage II, the SP-PFC operates in Mode 2. The input voltage of FBC equals the voltage on the secondary side of the isolation transformer UT2, and the filter inductor Lf and capacitor Cf are connected to the circuit. The equivalent model simplification process for SP-PFC in stage II is shown in

Fig. 4 Equivalent model simplification process for SP-PFC in stage II.
The frequency-domain equivalent circuit with SP-SFC in stage II is shown in

Fig. 5 Frequency-domain equivalent circuit with SP-PFC in stage II.
Therefore, the expression of the output voltage of SP-PFC in stage II is given as:
(4) |
(5) |
where Vk0 is the initial voltage of capacitance.
Directly including line coupling inductance in the two-pole line equations complicates the model and makes it challenging to solve. Meanwhile, ignoring the line coupling inductance inevitably leads to inaccurate calculation of fault current. Therefore, this paper utilizes the decoupling matrix A in [
The influence of line coupling inductance on pole-to-ground (PTG) faults varies depending on the fault location. It is important to note that this influence is significantly less than that observed in pole-to-pole (PTP) faults [
To derive the CDM equivalent circuit, it is necessary to derive the CDM circuits of VSC, line, fault port, and SP-PFC. The CDM circuits of VSC, line, and fault port in modal component space can be found in [
In stage I, the voltages at two ports of SP-PFC, analyzed in the polar component space, can be derived through (3), which are given as:
(6) |
where and are the positive and negative line voltages on the output side of SP-PFC, respectively; and are the positive and negative line voltages on the input side of SP-PFC, respectively; and and are the positive and negative line currents, respectively.
Then, the voltages at two ports, analyzed in modal component space, can be derived through (6), which satisfy:
(7) |
where and are the CM and DM line voltages on the output side of SP-PFC, respectively; and are the CM and DM line voltages on the input side of SP-PFC, respectively; and and are the CM and DM line currents, respectively.

Fig. 6 Equivalent models of SP-PFC in stage I. (a) In polar component space. (b) In modal component space.
In stage II, the voltages at two ports of SP-PFC in polar component space can be derived through (4), which satisfy:
(8) |
The voltages at two ports, analyzed in modal component space, can be derived through (8), which satisfy:
(9) |

Fig. 7 Equivalent models of SP-PFC in stage II. (a) In polar component space. (b) In modal component space.
The CDM equivalent circuits in different fault stages are shown in

Fig. 8 CDM equivalent circuits in different fault stages. (a) In stage I. (b) In stage II.
As shown in
(10) |
(11) |
where Rf is the fault transition resistance; is the line coupling inductance; is the fault transition inductance; is the line resistance; x is the proportion of distance between the fault point and VSC 1 to the total line length; and is the power supply voltage of VSC 1.
The influence of on the fault current is very small and can be ignored. And the SP-PFC output voltage in stage I is given as:
(12) |
As shown in
(13) |
(14) |
The output voltage of SP-PFC in stage II can be expressed as:
(15) |
The fault current limiting contribution of SP-PFC in the fault current limiting stage is closely related to the integral value of its output voltage [
(16) |
where k and b are the rise rate and initial value of fault current in stage II, respectively.
According to (15) and (16), can be expressed as:
(17) |
Assuming the duration of stage II is , the fault current limiting contribution in stage II can be expressed as:
(18) |
The CDM equivalent circuits shown in
Parameter | Value | Parameter | Value |
---|---|---|---|
Udc | 380 V | n | 10 |
Ca | 3 mF | Cf | 0.8 mF |
LL | 3.5 mH | Lf | 0.5 mH |
RL | 1.8 Ω | UT2 | 35 V |
M | 0.9 mH | Rσ | 0.1 Ω |
Firstly, the influence of Rf and Lsr on current limiting characteristics of SP-PFC is analyzed.

Fig. 9 If and Vk under different Rf and . (a) If under different Rf. (b) Vk under different Rf. (c) If under different Lsr. (d) Vk under different Lsr.
According to (15), the output voltage of SP-PFC in stage II is given as:
(19) |
Accordingly, the output voltage is influenced by Cf and Lf.

Fig. 10 If and Vk under different Cf and Lf. (a) If under different Cf. (b) Vk under different Cf. (c) If under different Lf. (d) Vk under different Lf.
The DCCB interrupting current and the fault current limiting contribution of SP-PFC under different Cf and Lf are shown in

Fig. 11 DCCB interrupting current and fault current limiting contribution under different Lf and Cf. (a) DCCB interrupting current. (b) Fault current limiting contribution.
Once Lf is determined, there exists only an unique value of Cf that minimizes the DCCB interrupting current while maximizing the fault current limiting contribution of SP-PFC. The data points in
(20) |

Fig. 12 Optimization of data points and fitted curve.
where is an optimal parameter.
The parameter optimization method can be theoretically validated by assessing the fault current limiting contribution of SP-PFC. To Satisfy the fitted curve proposed in (20), SPFC according to (18) is given as:
(21) |
According to (21), there is an optimal parameter a within a reasonable range of 0.3-0.5 mH, which maximizes and remains unchanged regardless of different Lf. Meanwhile, increases with the increase of Lf after the optimization, which is fully consistent with the results shown in
Based on the above analysis, it is recommended to configure Cf according to (20), which is the principle of the parameter optimization method. Under this principle, the fault current limiting contribution of SP-PFC can be increased by appropriately increasing Lf. However, it should not be overlooked that the power electronics of SP-PFC will face higher voltage stress. Besides, when Cf is very small, its voltage regulation capability is inevitably affected during normal operation. According to (17), the maximum voltage that the SP-PFC can withstand is given as:
(22) |
Therefore, the selection of Lf must guarantee that the maximum voltage Vmax remains within the voltage tolerance range of its power electronic devices during faults. Considering the corner frequency of LC filter, it effectively attenuates harmonics beyond the cutoff frequency. However, excessively low cutoff frequencies may adversely affect the dynamic performance of the system. To mitigate the influence of parameter optimization method on both the filtering capability and dynamic performance of LC filters, this paper evaluates the switching frequency and filtering needs of the FBC. Consequently, the corner frequency is set to be 220 Hz. As a result, parameter a is chosen within the range of 0.42-0.52 mH·mF.
With the CDM equivalent circuits, the influence of the line coupling inductance M on If and Vk can be analyzed. The fault position determines the influence of M [

Fig. 13 Influence of M on If and Vk at different fault positions. (a) If. (b) Vk.
In
According to the above analysis, the fault current limiting contribution of SP-PFC is single and does not vary if the emergency control activation time Tw is fixed.

Fig. 14 If and Vk under different Tw of SP-PFC. (a) If. (b) Vk.
An SAAS of SP-PFC is proposed in this paper to match the different fault severities. The SAAS of SP-PFC operates independently of the command of DC protection system and utilizes the fault detection signal of SP-PFC instead, which enables a faster response. The fault current limiting characteristics under two typical fault severities are shown in

Fig. 15 Fault current limiting characteristics under two typical fault severities. (a) Serious fault. (b) Minor fault.

Fig. 16 Flowchart of coordination of SP-PFC and DCCB.
In
To verify the validity of the CDM equivalent circuits, parameter optimization method, and SAAS of SP-PFC, a three-terminal DC grid simulation model is established in MATLAB/Simulink and a fault current limiting experiment with SP-PFC is implemented. The structure and parameters of the simulation model are provided in Supplementary Material A. All converter stations are directly grounded, configured in a bipolar arrangement without neutral line. DC reactors are installed at the beginning and end of the lines. The distribution line parameters are as follows: the unit resistance of the distribution line is 0.188 , the unit inductance of the distribution line is 0.358 mH/km, and the unit coupling inductance of the distribution line is 0.18 mH/km.
FP 1, FP 2, and FP 3 are the fault positions at the beginning, middle, and end of Line 12, respectively. The DC fault occurs at 0.6 s, and the fault location is FP 1. DCCB trips at 0.604 s. Firstly, the feasibility of fault current limiting in a three-terminal bipolar DC distribution system based on SP-PFC is verified. Set , mH, and ms.

Fig. 17 Simulation results of three-terminal DC distribution system with and without SP-PFC. (a) If. (b) Vbus.
With the SP-PFC in operation, the maximum value of If decreases significantly from 125.3 A to 98.6 A, indicating a significant reduction in fault current. Furthermore, the SP-PFC induces notable changes in the power flow distribution of the DC lines, rendering the power flow fully controllable in the three-terminal bipolar DC distribution system. The voltage drop of Vbus is also suppressed by SP-PFC, as shown in
Then, the correctness of the CDM equivalent circuit is verified. Parameters remain unchanged and the fault location is set at FP 3. The calculation results are obtained by analytical calculation based on the CDM equivalent circuit.

Fig. 18 Calculation and simulation results with and without line coupling inductance M. (a) If. (b) Vk.

Fig. 19 Simulation results under different Rf and Lsr. (a) Under different Rf. (b) Under different Lsr.
The fault position is set at FP 1 and parameters are the same as those in Section V-A.
Lf (mH) | Cf (mF) | SPFC (V·ms) | IDCCB (A) |
---|---|---|---|
0.25 | 1.6 | 147.9 | 119.0 |
1.4 | 145.3 | 115.3 | |
1.2 | 154.7 | 100.3 | |
1.0 | 148.0 | 110.0 | |
0.50 | 1.2 | 155.0 | 99.5 |
1.0 | 172.2 | 94.0 | |
0.8 | 168.0 | 100.9 | |
0.6 | 145.0 | 110.0 | |
0.75 | 1.0 | 175.5 | 100.0 |
0.8 | 180.5 | 90.0 | |
0.6 | 190.6 | 84.0 | |
0.5 | 175.0 | 98.0 | |
1.00 | 1.0 | 174.5 | 100.0 |
0.8 | 190.1 | 87.0 | |
0.5 | 201.5 | 85.0 | |
0.3 | 168.5 | 94.0 | |
1.25 | 0.7 | 198.6 | 84.0 |
0.5 | 222.6 | 73.0 | |
0.4 | 223.9 | 72.0 | |
0.3 | 205.0 | 84.0 | |
1.50 | 0.5 | 227.3 | 73.0 |
0.4 | 230.4 | 69.0 | |
0.3 | 238.0 | 65.0 | |
0.2 | 189.6 | 85.0 |
After the parameter optimization, Lf is set to be 0.9 mH and Cf is set to be 0.5 mF.

Fig. 20 Simulation results before and after parameter optimization. (a) If. (b) Vk.

Fig. 21 Influence of M on If and Vk at different fault positions. (a) If. (b) Vk.
The simulation results under different are shown in

Fig. 22 Simulation results under different Tw. (a) If. (b) Vk.

Fig. 23 Simulation results under different faults with different action strategies. (a) DCCB interrupting current. (b) Peak value of Vk.
It is crucial to clarify that the contemporary research on CFCs and their application for fault current limiting is predominantly focused on high-voltage scenarios. Given the distinct differences in system characteristics between HVDC and LVDC systems, direct comparisons of fault current limiting effects may not be entirely straightforward. To address this, the CFC-based fault current limiting strategies in [

Fig. 24 Simulation results of three-terminal DC bipolar distribution system with and without CFC. (a) If. (b) VCFC.
The fault current limiting capability of both SP-PFC and CFC depend on their output voltage characteristics. After the activation of current limiting control, CFC behaves as a capacitor, while SP-PFC is equivalent to a voltage source connected in series with an inductor and then connected in parallel with the capacitor.

Fig. 25 Schematic diagram of output voltage characteristics during short-circuit fault of SP-PFC and CFC. (a) SP-PFC. (b) CFC.
The experimental platform of the bipolar DC distribution system with SP-PFC is built, as shown in

Fig. 26 Experimental platform of DC distribution system with SP-PFC.
The fault current If of SP-PFC with and without emergency control is shown in

Fig. 27 Fault current If of SP-PFC with and without emergency control. (a) With emergency control. (b) Without emergency control.
Experimental results under different fault transition resistances are shown in

Fig. 28 Experimental results under different fault transition resistances. (a) 0.1 Ω. (b) 1 Ω. (c) 2 Ω.
The filter capacitance and inductance parameters of the SP-PFC are optimized by using the parameter optimization method. The optimized parameters are as follows: mH and . The experimental results before and after parameter optimization are shown in

Fig. 29 Experimental results before and after parameter optimization. (a) Before parameter optimization. (b) After parameter optimization.
To verify the feasibility of SAAS of SP-PFC, the emergency control activation time of SP-PFC is varied, and the experimental results under different activation time of emergency control of SP-PFC are shown in

Fig. 30 Experimental results under different activation time of emergency control of SP-PFC. (a) 0.5 ms. (b) 2 ms.
This paper proposes an SAAS and a parameter optimization method of SP-PFC to achieve the fault current limiting target more effectively in bipolar DC distribution systems. To clearly analyze the fault current limiting characteristics of SP-PFC, the CDM equivalent circuits considering line coupling inductance are derived for bipolar DC distribution systems with SP-PFC in different fault stages. An analysis is conducted on the influence of different parameters on the fault current limiting contribution of SP-PFC. The analysis reveals that the fault current limiting contribution of SP-PFC is little affected by fault transition resistance, line inductance, and line coupling inductance. The greatest fault current limiting contribution is observed when the filter capacitance and inductance are inversely proportional. The SAAS of SP-PFC is proposed to match different fault severities. Theoretical analysis and simulation results show that the CDM equivalent circuit can achieve accurate decoupling calculations for fault currents, and the parameter optimization method enhances the fault current limiting contribution of SP-PFC by approximately 15%. The SAAS of SP-PFC adaptively activates emergency control according to the fault severity, which achieves the fault current limiting target as much as possible while minimizing its fault current limiting pressure to extend its lifespan.
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