DC/DC converters are poised to play a crucial role in the development of multi-terminal high-voltage direct current (HVDC) and DC grids. These converters facilitate key functionalities such as enabling power trading between DC systems with varying or equal voltage levels, ensuring interoperability, supporting bidirectional power flow control, and providing stabilization and DC fault isolation capabilities [1]-[5]. CIGRE has recognized the importance of DC/DC converters, exploring their applications through various working groups, including WG B4.52 on the feasibility of DC grids [6], WG B4.58 on power flow controllers in meshed HVDC grids [7], and WG B4.76 on DC/DC converter applications in HVDC and DC grids [8].
There are two primary families of HVDC DC/DC converters: isolated converters, typically employing the dual active bridge topology with a two-stage DC/AC/DC conversion process; and non-isolated converters based on modular multilevel converter (MMC) technology, referred to as DC modular multilevel converters (DC-MMCs), which utilizes a single-stage conversion approach.
DC-MMCs are emerging as a potential cost-effective solution for interconnecting HVDC systems, particularly due to their lower capital costs and reduced power losses compared with isolated DC/DC converters, resulting from the elimination of the additional conversion step. This advantage is especially significant when the DC voltage step ratio is low, and the HVDC systems share similar configurations. Most HVDC systems operate at a few hundred kilovolts, leading to a low DC voltage step ratio in HVDC-HVDC interconnections. This low ratio ensures high component utilization within the DC-MMC. Furthermore, since the majority of current and planned HVDC systems are configured as monopole symmetrical or bipole voltage source converter based HVDC (VSC-HVDC) links, the DC-MMC presents itself as a highly suitable option for interconnecting these HVDC systems.
The concept, design, and control principles of DC-MMC have been discussed extensively in [1]-[3], with comparisons to isolated dual active bridge DC/DC converters for HVDC and medium-voltage DC (MVDC) applications provided in [9]. A phasor-domain steady-state model for DC-MMC is introduced in [10], which serves as the foundation for subsequent converter and control design in [11]. However, this model only accounts for DC and fundamental frequency components, overlooking the 2nd harmonic components and their interaction with other coordinate frames, thus reducing the model accuracy. Similar oversimplifications are found in the linearized model presented in [12]. Although a more detailed analytical phasor model is provided in [13], it remains focused on the steady-state analysis of converter currents, voltages, and power flow, neglecting the dynamic behavior of the converter. These oversights highlight the need for more comprehensive models that incorporate dynamic factors to improve the accuracy and reliability of DC-MMC in future DC grid applications.
A significant gap in the existing literature is the assumption that DC-MMCs are connected to rigid DC sources on both ends. This simplification ignores the dynamic interactions between the DC-MMC and other interconnected DC subsystems, which is crucial for understanding the stability and control of future DC grids. In the anticipated future configuration of DC grids, each side of a DC-MMC will be connected to other DC systems through HVDC cables or lines. These interconnections introduce additional complexities that have not been fully addressed in previous research [14]. The dynamic interactions among multiple DC systems, mediated by HVDC cables, could significantly influence the overall stability and control of the DC grid, necessitating a more thorough investigation into these aspects.
This paper seeks to address these knowledge gaps by investigating the impact of the 2nd and higher harmonics on the accuracy of the DC-MMC model. This paper reveals the critical importance of the 2nd harmonic in the model, while demonstrating that higher harmonics have a negligible impact and can be safely ignored.
The proposed model is then applied to evaluate the influence of HVDC cables connected to both sides of the DC-MMC on its control and stability. HVDC cables are meticulously modeled using cascaded proportional-integral (PI) sections with parallel RL branches [15], [16]. The parameters of the parallel RL branches are estimated via the vector-fitting approach [17]. The study shows that long HVDC cables introduce oscillations and potential instability into the interconnected system, which is analyzed using eigenvalue analysis techniques [18]. The proposed model is further employed to design a damping controller to suppress these oscillations and stabilize the system, utilizing participation factor (PF) and residue approaches [19], [20]. Notably, the study identifies the 2nd harmonic component of the upper-arm sum voltage as the most effective feedback signal, underscoring the significance of the 2nd harmonic components in the modeling and control of DC-MMC. The key contributions of this paper can be summarized as follows.
1) Accurate dynamic phasor model: this paper introduces a novel closed-loop dynamic phasor model for DC-MMC, incorporating the 2nd harmonic dynamics and evaluating the impact of higher harmonics on model accuracy. Additionally, the dynamics of the 2nd harmonic current suppression controller (SHCSC) is modeled and integrated into the closed-loop DC-MMC model.
2) Realistic test case: this paper presents a realistic test case where DC-MMC is connected to HVDC cables on both sides, allowing for an in-depth analysis of DC voltage dynamics and the effects on the stability and control of the DC-MMC and broader interconnected system.
3) Application example and controller design: the proposed model is used to examine the impact of HVDC cables of varying lengths on system performance and stability, followed by the design of a damping controller to mitigate oscillations.
This comprehensive approach aims to enhance the understanding of DC-MMC performance, positioning it as a potentially cost-effective single-stage DC/DC converter for future DC grid applications, particularly in the interconnection of HVDC links and systems.
Figure 1 illustrates the structure of a unipolar p-phase DC-MMC [3], where and are the high voltage (HV) and low voltage (LV) side voltages of DC-MMC, respectively; and are the HV and LV side DC currents of DC-MMC, respectively; and are the upper- and lower-arm currents, respectively; and are the upper- and lower- arm sum voltages, respectively; and are the upper- and lower-arm equivalent resistances, respectively; and are the upper and lower submodule capacitances, respectively; and are the upper- and lower-arm inductances, respectively; and are the upper- and lower-arm voltages, respectively; and is the line inductance. In each lower arm, there are half-bridge submodules (HBSMs). The upper arms consist of full-bridge submodules (FBSMs) to provide fault-blocking capabilities [2]. It is worth mentioning that the fault-blocking capability can be achieved by incorporating a specific number of submodules only in the upper arm, denoted as . This reduces the capital cost and power losses while maintaining fault isolation between the two sides of the DC-MMC by generating voltage in the upper arm to prevent the HV fault propagation to the LV side [21]. However, for simplicity, all the submodules in the upper arm in Fig. 1 are shown as FBSMs.
Fig. 1 Structure of a unipolar p-phase DC-MMC.
B. Dynamic Equations of DC-MMC
The dynamic equations of the DC-MMC are given in [3], and a summary is included here for completeness. The constituent dynamic equations for arm currents and arm sum voltages are:
where and are the upper- and lower-arm control signals, respectively; and and are the upper- and lower- arm submodule capacitances, respectively.
III. Dynamic Open-loop model
A. Assumptions and Definitions
The assumptions are made as follows.
1) The DC-MMC operates in the balanced mode, where all phases exhibit uniformity, characterized by the same DC component and sinusoidal AC components with a 120° phase shift in the case of a three-phase DC-MMC.
2) The upper- and lower-arm currents for one phase-leg are composed of DC, fundamental frequency, and higher harmonics components given by:
where the subscripts denote the DC components of the upper and lower arms, respectively; the subscripts denote the ith harmonic amplitudes of the upper- and lower-arm currents, respectively; , and is the arbitrarily selected internal operating frequency of the DC-MMC; are the phase shifts of the upper- and lower-arm currents, respectively; and the subscripts and denote the harmonic components of upper- and lower-arm currents, respectively. At the outset, we assume that the arm currents encompass all harmonics. However, it will be demonstrated later in this paper that harmonics of order 3 and above exert negligible influence on the model accuracy and can thus be disregarded. The arm currents of the other phase-legs can be analogously represented, incorporating a phase shift of , where denotes the number of phases.
3) Similarly, the upper- and lower-arm sum voltages for one phase-leg can be represented as:
where and are the phase shifts of the upper- and lower-arm voltages, respectively.
4) The control signals may or may not include a 2nd harmonic component, depending on whether the control incorporates SHCSC. Initially, this paper addresses control without SHCSC, followed by its addition. Consequently, at this stage, the control signals for both upper and lower arms are considered to contain only DC and fundamental components [11]:
It is worth noting that the upper control signal has only and components (=), and the lower control signal has only , , and components.
B. 2nd-order Open-loop dq Model
The dynamic equations for the DC component, fundamental frequency, and 2nd harmonics of the DC-MMC are formulated in [22]. These equations can be expressed as a 2nd-order open-loop model for the DC-MMC in the matrix form as:
where , , and are defined in Supplementary Material A.
C. 3rd and Higher Harmonics
The 3rd and higher harmonics can be modelled in a similar way to the 2nd harmonic [22]. However, as it is investigated in this paper, the 3rd and higher harmonics have negligible impact on the model accuracy, and therefore they have not been presented here for space brevity.
IV. Dynamic Closed-loop Model
There are various options available for the DC-MMC controller, and Fig. 2 illustrates a DC-MMC control block [13], as considered in [2], where the subscript ref represents the reference value. This controller incorporates five PI control loops . Specifically, the control signals and are responsible for ensuring energy balancing in the converter arms by regulating the arm sum voltages. The inner current control loops play a crucial role in improving the system response and restricting the upper- and lower- arm currents under abnormal operating conditions. The phase shift of the lower-arm fundamental component is employed to regulate the DC power flow towards the reference value . Typically, the reference values for the arm sum voltages are chosen to be constant and equal to the rated voltage of the HV side, i.e., [13].
Fig. 2 DC-MMC control block.
The controller, in conjunction with the following equation, generates the control signals and as expressed in (6), or equivalently the five control signals , , , , and in frame [13]:
The controller dynamic equations can be derived from the control block as:
where ; ; ; and .
While the 2nd harmonic arm currents in DC-MMC are typically lower compared with those in conventional AC/DC MMC, a similar SHCSC can be implemented to mitigate them [23]. Each of the four variables associated with the 2nd harmonic arm currents (, , , and ) requires an individual PI control loop. Consequently, the implementation of SHCSC necessitates the use of four PI loops.
The control signals (6) for the DC-MMC with SHCSC are then modified as:
This modification means that the 2nd harmonic components / and / are added to the control signals in frame. The dynamic equations of these four control signals can be written as [23]:
It is important to note that an effective SHCSC successfully suppresses the 2nd harmonic components of the upper- and lower-arm currents in steady states. However, it is crucial to recognize that the dynamic terms of these currents still persist.
C. DC-MMC Closed-loop Nonlinear Model Without SHCSC
In this paper, the investigation reveals that the 2nd harmonic exerts a significant impact on the model accuracy, whereas the influence of 3rd and higher order harmonics is negligible. Consequently, the closed-loop model is exclusively developed for the open-loop model featuring the 2nd harmonics, as detailed in Supplementary Material A.
The DC-MMC closed-loop nonlinear model without SHCSC is obtained by combining the open-loop model (7) and the controller model (9) as:
The 2nd-order closed-loop nonlinear model without SHCSC has 25 states and 3 inputs.
D. DC-MMC Closed-loop Nonlinear Model with SHCSC
The DC-MMC closed-loop nonlinear model with SHCSC is obtained by combining (11) and (12) as:
where the input vector is defined in Supplementary Material B. The 2nd-order closed-loop nonlinear model with SHCSC has 29 states and 3 inputs.
Figure 3 illustrates the block diagram of the DC-MMC closed-loop nonlinear model with SHCSC. The DC-MMC parameters encompass the cell capacitances of the converter, arm and line inductances, and arm resistance. The model output consists of any of the 29 states or a combination. This is dependent on the input of the component that is intended to be connected to this converter.
Fig. 3 Block diagram of DC-MMC closed-loop nonlinear model with SHCSC.
V. DC-MMC with HVDC Cables
In this section, the inclusion of one HVDC cable on each side of the DC-MMC is contemplated to introduce dynamic behavior to the DC voltage on both sides in the event of any disturbance. This augmentation serves to enhance the study of the performance of the converter in a more realistic environment, akin to potential real-world DC systems in the future.
The HVDC cable model, as introduced in [16], is employed for the HVDC cables connected to both sides of the DC-MMC. Figure 4 presents the circuit of this model, featuring one PI section and parallel RL branches. This configuration is designed to enhance the accuracy of the HVDC cable model across a broader range of frequencies, as detailed in [16], [24], and [25].
Fig. 4 Circuit of HVDC cable model.
To enhance model accuracy, incorporating multiple cascaded PI sections is advantageous, particularly for long HVDC cables, although this comes at the expense of increasing the order of both the HVDC cable and the overall system. The parallel RL values are determined using the vector fitting approach [17] while generation G and capacitance C can be derived from the cable data. The cable model can be succinctly represented in the standard state-space form provided below with the states be the voltages and the inductor currents of the capacitors. The output and inputs and can be selected as a combination of voltage and current on each side of the HVDC cable depending on what is connected to the HVDC cable.
where is the state matrix; and are the input matrices; and is the output matrix.
B. Interconnection of DC-MMC and HVDC Cable Models
The interconnected system, composed of a DC-MMC closed-loop nonlinear model without SHCSC and two HVDC cables, is shown in Fig. 5, where and are the DC voltages on HV and LV sides, respectively.
Fig. 5 Interconnected system including DC-MMC and two HVDC cables.
The interconnected system model can be given as:
where and are the outputs of the DC-MMC that used as the inputs to the cables. can be written as:
The PSCAD benchmark model comprises a three-phase DC-MMC, as depicted in Fig. 1, connected to DC sources on both sides, either directly (Section VI-B to Section VI-E) or via HVDC cables (Section VI-F). The DC-MMC open-loop linear and closed-loop nonlinear models (7), (12), (13), and the interconnected system model (15) are implemented in MATLAB, and their accuracies are systematically evaluated against the PSCAD benchmark model.
Each DC-MMC arm valve is modelled using a type 5 model and an equivalent series resistor [26]. The key parameters of the DC-MMC are outlined in Table I. The internal operating frequency of the converter, as a crucial design parameter influencing size and power loss [21], is set to be 150 Hz in this paper.
TABLE I
DC-MMC Parameters
Parameter | Value | Parameter | Value |
|
600 |
(Ω) |
1.44 |
(kV) |
320 |
(Ω) |
0.96 |
(kV) |
250 |
(kV) |
320 |
|
160, 160 |
(kV) |
320 |
(mF) |
4.4 |
(mH) |
11 |
(mF) |
12.2 |
(mH) |
80 |
B. Verification of DC-MMC Open-loop Linear Model
The accuracy of the DC-MMC open-loop linear model (7) is validated against the PSCAD benchmark model under various disturbances. For brevity, only the results depicting the upper-arm current in response to a 5% step-down on the LV side voltage are presented, as shown in Fig. 6. The control modulation indices for this test case are: ,.
Fig. 6 Results for upper-arm current in response to 5% step-down on LV side voltage.
The observed good matching indicates that the proposed DC-MMC open-loop linear model is highly accurate.
C. Impact of 2nd and 3rd Harmonics on Model Accuracy
The study examines the influence of the 2nd and 3rd harmonics on model accuracy. To conduct this investigation, two additional models are developed: ① a 1st-order model comprising only zero sequence and fundamental frequency, and ② a 3rd-order model encompassing zero sequence, fundamental frequency, and 2nd and 3rd harmonics. The respective orders of the 1st-, 2nd-, and 3rd-order open-loop models are 12, 20, and 28, respectively.
The model accuracy is validated against the PSCAD benchmark model, and the errors of the upper-arm current for a 5% step-down on the LV side voltage at s are depicted, as shown in Fig. 7, where , , and refer to the errors of , , and , respectively. Notably, the error of the 1st-order open-loop model is considerably higher than those of the other two models, while the errors of the 2nd- and 3rd-order open-loop models are very small and nearly identical. This suggests that the impact of the 2nd harmonics on model accuracy is significant and should be considered in many applications. Conversely, the 3rd harmonics (and higher harmonics) have a negligible impact and can be safely ignored. Consequently, the 2nd-order open-loop model, which includes zero sequence, fundamental frequency, and 2nd harmonics, is adopted in this paper.
Fig. 7 Impact of 2nd and 3rd harmonics on model accuracy.
D. Verification of DC-MMC Closed-loop Nonlinear Model
The accuracy of the DC-MMC closed-loop nonlinear model (12) is validated against the PSCAD benchmark model under various step inputs. Figure 8 illustrates the results for the upper-arm sum voltage in response to a 5% step-up on the HV side voltage at s. The good matching observed in the results verifies that the proposed DC-MMC closed-loop nonlinear model is highly accurate.
Fig. 8 Results for upper-arm sum voltage in response to a 5% step-up on HV side voltage.
E. Impact of SHCSC on Accuracy of DC-MMC Closed-loop Nonlinear Model
This subsection examines the impact of SHCSC on the accuracy of the DC-MMC closed-loop nonlinear model. In Fig. 9, the results illustrate the response of the upper-arm voltage to a 5% step-up on the HV side voltage. It is observed that the DC-MMC closed-loop nonlinear model with SHCSC (13) demonstrates an insignificant improvement compared with the DC-MMC closed-loop nonlinear model without SHCSC (12). Nevertheless, considering the adequate accuracy and lower-order of the DC-MMC closed-loop nonlinear model without SHCSC, it is employed in the subsequent section to assess the impact of HVDC cable on the DC-MMC.
Fig. 9 Results for upper-arm voltage in response to a 5% step-down on HV side voltage.
F. Verification of Interconnected System Model
The proposed interconnected system (15) integrates one DC-MMC and two 100 km HVDC cables. Initially, the HVDC cable model is developed using a single PI section with multiple parallel RL branches, as shown in Fig. 4. The accuracy of the HVDC cable model is verified against a wide-band cable model (PSCAD) across a frequency spectrum ranging from 0.001 Hz to 5000 Hz. Figure 10 shows the magnitude and phase of 100 km HVDC cable models with 3, 5, and 7 parallel RL branches against wide-band cable model. It is observed that the HVDC cable model utilizing 5 parallel RL branches achieves a high degree of accuracy. A higher-order cable model, either with additional PI sections or more parallel RL branches, slightly improves the accuracy but also increases the order and complexity of the model.
Fig. 10 Magnitude and phase of 100 km HVDC cable models with 3, 5, and 7 parallel RL branches against wide-band cable model.
Figure 11 illustrates the results for the lower-arm sum voltage in response to a 5% step-up on the HV side voltage at s. The observed good matching indicates that the proposed model is accurate and well-suited for design and analysis purposes.
Fig. 11 Results for lower-arm sum voltage in response to a 5% step-up on HV side voltage (DCMMC+two 100 km cables).
Figure 12 shows the impact of cable length on DC-MMC DC voltage dynamic in response to a 5% step-up on LV side voltage. The introduction of HVDC cables imparts dynamics to the DC voltages on both sides of the DC-MMC. The lengthening of HVDC cables amplifies this dynamic effect, potentially leading to system instability, a topic that will be explored in the subsequent section.
Fig. 12 Impact of cable length on DC-MMC DC voltage dynamic in response to a 5% step-up on LV side voltage.
VII. Stability Analysis and Damping Control Design
The proposed interconnected system models are versatile tools applicable for stability analysis and controller design. In this section, the interconnected system model is employed to conduct a thorough analysis of system stability. Subsequently, a damping controller is designed to mitigate oscillations and stabilize the system.
A. Impact of Cable Length on Interconnected System Stability
Table II provides the most sensitive eigenvalues of the interconnected system for varying cable lengths. As observed, the eigenvalues shift towards the right half-plane with increasing cable length, indicating a growing oscillatory tendency. Notably, the interconnected system reaches instability for HVDC cables longer than 190 km.
TABLE II
Most Sensitive Eigenvalues of Interconnected System for Varying Cable Length
Cable length (km) | Most sensitive eigenvalue |
50 |
|
100 |
|
150 |
|
190 |
|
B. Damping Control Design
The stability analysis of the interconnected system reveals that the generic control structure illustrated in Fig. 2 is insufficient for effectively damping oscillations and stabilizing the system. Consequently, the introduction of a suitable damping controller becomes imperative.
The damping controller is designed to monitor one or more states within the interconnected system and adjust one of the outputs of the generic controller presented in Fig. 2. To identify the optimal states for feedback, the approach is employed [27]. PFs are computed by element-wise multiplication of the right and left eigenvectors associated with the matrix A of the linearized system in (15).
These PFs are calculated and normalized across various cable lengths, and the states with the highest PF are selected as the most suitable candidates for the feedback signals [18]. As an example, in a system with 100 km cable length, the highest PF is 0.192, corresponding to the 2nd harmonic components of and .
To determine the best control inputs to pair with the selected feedback signals or , the residue approach is employed [20]. In Table III, the calculated residue values are presented for the 5 generic control signals to pair with or for the interconnected system with 100 km cable length. The pair (, ) exhibits the highest magnitude and is thus selected for the damping control.
TABLE III
Residue Values of Selected Feedback Signals andGeneric Control Signals
Generic control signal | Residue value |
---|
| |
|
2.140 |
2.140 |
|
0.005 |
0.005 |
|
0.016 |
0.016 |
|
0.010 |
0.010 |
|
2.150 |
2.140 |
Figure 13 depicts the revised control block diagram with the integrated damping controller. The signal is filtered and added, with gain , to the control signal . The band pass filter (BPF) has a resonant frequency of 4 Hz and a damping ratio of 0.707, where the resonant frequency is determined based on the oscillation frequency of after applying a step disturbance. Notably, after applying this disturbance step, an oscillation frequency between 3.5 Hz and 7 Hz becomes apparent in without the damping controller. Subsequent fine-tuning reveals that a resonant frequency of 4 Hz significantly enhances system performance. Here, the damping gain is selected.
Fig. 13 Revised control block diagram with integrated damping controller.
C. Verification of Damping Controller
The effect of the damping controller on the performance of the interconnected system is scrutinized for varying cable lengths. Table IV provides the most sensitive eigenvalues of the interconnected system for different cable lengths, both with and without the damping controller. Notably, the proposed damping controller induces a shift of the eigenvalues towards the left, indicative of a more stable system. Remarkably, the proposed damping controller demonstrates the capability to stabilize the system for HVDC cables with up to 337 km cable length.
TABLE IV
Most Sensitive Eigenvalues of Interconnected System for Different Cable Lengths with and Without Damping Controller
Cable length (km) | Most sensitive eigenvalue without damping controller | Most sensitive eigenvalue with damping controller |
50 |
|
- |
100 |
|
- |
150 |
|
- |
190 |
|
- |
250 |
|
- |
300 |
|
- |
337 |
|
|
Figure 14 shows the upper-arm sum voltage results for a 5% step-up on LV side voltage with and without the damping controller while the cable length is 100 km. It is evident that the damping controller significantly diminishes the oscillations. In Fig. 15, the results are represented with the cable length extended to 190 km. Notably, the system exhibits instability without the damping controller, but the stability is restored by including the damping controller. The simulation results are consistent with the eigenvalue analysis given in Table IV.
Fig. 14 Results for upper-arm sum voltage in response to 5% step-up on LV side voltage with and without damping controller.
Fig. 15 Results for upper-arm sum voltage in response to 5% step-up on LV side voltage with 190 km cable lengths.
This paper presents a robust and comprehensive modeling approach for DC-MMC systems, introducing a 20th-order open-loop linear model and a 25th-order closed-loop nonlinear model. These models meticulously account for converter variables across three dq frames, effectively addressing significant coupling effects. Validation against PSCAD benchmark models demonstrates the high accuracy of the proposed model.
A critical investigation into the impact of harmonics reveals that while the 2nd harmonic notably affects the model accuracy, higher order harmonics are largely negligible, streamlining the analysis process. Efforts to enhance the DC-MMC closed-loop nonlinear model through the integration of SHCSC model provide limited improvements, reinforcing the robustness of the original model structure. Expanding the application of the model, the DC-MMC closed-loop nonlinear model is integrated with two HVDC cables modeled using the vector fitting approach, creating an interconnected system model. This advanced interconnected system model enables a detailed analysis of the influence of cable length on system performance. To ensure stability in the interconnected systems with extended cable lengths, a damping controller is successfully designed and implemented. The insights gained here provide valuable guidance for practical implementation of interconnected systems, particularly in enhancing system stability under varying cable lengths.
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