Journal of Modern Power Systems and Clean Energy

ISSN 2196-5625 CN 32-1884/TK

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Steady-state Voltage Security-constrained Optimal Frequency Control for Weak HVDC Sending-end AC Power Systems  PDF

  • Qiangqiang Wang 1,2
  • Liangzhong Yao 1,2
  • Jian Xu 1,2
  • Yuping Zheng 3
  • Wei Li 3
  • Wei Wang 3
1. the School of Electrical Engineering and Automation, Wuhan University, Wuhan 430072, China; 2. Hubei Engineering and Technology Research Center for AC/DC Intelligent Distribution Network (Wuhan University), Wuhan 430072, China; 3. State Key Laboratory of Smart Grid Protection and Control, NARI Group Corporation (State Grid Electric Power Research Institute), Nanjing 211106, China

Updated:2024-03-26

DOI:10.35833/MPCE.2023.000357

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Abstract

Due to the fact that a high share of renewable energy sources (RESs) are connected to high-voltage direct current (HVDC) sending-end AC power systems, the voltage and frequency regulation capabilities of HVDC sending-end AC power systems have diminished. This has resulted in potential system operating problems such as overvoltage and overfrequency, which occur simultaneously when block faults exist in the HVDC link. In this study, a steady-state voltage security-constrained optimal frequency control method for weak HVDC sending-end AC power systems is proposed. The integrated virtual inertia control of RESs is employed for system frequency regulation. Additional dynamic reactive power compensation devices are utilized to control the voltage of all nodes meet voltage security constraints. Then, an optimization model that simultaneously considers the frequency and steady-state voltage security constraints for weak HVDC sending-end AC power systems is established. The optimal control scheme with the minimum total cost of generation tripping and additional dynamic reactive power compensation required is obtained through the optimization solution. Simulations are conducted on a modified IEEE 9-bus test system and practical Qing-Yu line commutated converter based HVDC (LCC-HVDC) sending-end AC power system to verify the effectiveness of the proposed method.

I. Introduction

LOW-CARBON targets have promoted the rapid development of renewable energy sources (RESs), such as wind power (WP) and photovoltaic (PV) power [

1]. By 2022, the total installed capacity of RESs in China exceeded 1213 GW, accounting for 47.3% of the total installed generation capacity, and the total installed capacity of RESs is expected to reach 62% by 2050 [2]. However, as WP and PV power are mainly concentrated in the three northern regions of China, which are far from load centers, high-voltage direct current (HVDC) transmission technology is an effective means of realizing large-scale and long-distance transmission of renewable power [3] because of its advantages of less losses, better controllability, and large-capacity transmission capabilities [4], [5].

With the regular expansion of the HVDC transmission scale and increasing penetration of RESs, massive existing synchronous generators (SGs) are gradually being replaced by RESs in HVDC sending-end AC power systems. This has resulted in the capability weakening of both frequency regulation and voltage support [

6]. A high proportion of RESs significantly influence the safe operation and stability of systems [7], [8]. Once a block fault occurs in an HVDC link, a series of frequency and voltage stability problems appear in the weak HVDC sending-end AC power system [9], [10]. For example, the Zhalute-Qingzhou HVDC project, the first HVDC transmission project of clean energy in the northeast China power grid, experienced an overfrequency of 51.5 Hz in the AC power system after the HVDC bipolar block. Simultaneously, the increase in steady-state overvoltage exceeded the limit of 20 kV, threatening equipment safety and normal operation of the system [11]. Since the massive surplus of active power in the AC power system following the HVDC link block fault caused a rapid increase in frequency [12], active power adjustment measures had to be adopted to suppress the overfrequency problem [13], [14]. In addition, the improper active power adjustment causes large-scale power flow transfer and steady-state overvoltage problems [15], which may result in damage to power equipment or disorderly disconnection of RESs [16]. Therefore, we propose effective frequency and voltage control measures for weak HVDC sending-end AC power systems when block faults occur in an HVDC link.

Active power adjustment measures for suppressing overfrequency problems following an HVDC link block fault include generation tripping and primary frequency regulation [

13]. Overfrequency generation tripping should comply with reasonable configuration principles and setting strategies [17]. Frequency droop and emergency control strategies that enable RESs to participate in frequency regulation were developed in [18]. In addition, the HVDC link can also be improved to provide frequency support capabilities [19]. Some studies have used optimization methods to adjust the generator output power to achieve frequency stability. Novel frequency-constrained optimization models have been proposed to obtain an optimal frequency control scheme. For example, a frequency stability-constrained optimal power flow model that considers HVDC corrective control to deal with frequency problems following HVDC bipolar blocks was proposed in [20], and security-constrained unit commitment models with frequency constraints were built to provide satisfactory frequency performance [21], [22]. However, these studies have focused only on frequency control without simultaneously considering voltage constraints. Voltage control schemes have been proposed to address overvoltage problems [23], [24]. Reactive power optimization is often used to determine the optimal reactive power control scheme that satisfies voltage security constraints [25]. Reactive power optimization methods and applications were reviewed in [26]. Appropriate reactive power optimization models were established in [27], [28]. Voltage sensitivity analysis methods were proposed to determine the optimal positions for additional reactive power compensation devices [29], [30]. Similarly, these studies mainly focused on voltage stability control without comprehensively considering frequency security constraints. However, overfrequency and overvoltage problems may occur simultaneously after HVDC link block faults in AC power systems. Therefore, frequency and voltage security constraints should be comprehensively considered to ensure that both frequency stability and voltage safety can be satisfied simultaneously. To achieve this, [31] proposed a comprehensive active and reactive power optimization method to solve the overfrequency and overvoltage problems following an HVDC link block fault. However, this work only considered the active power adjustment amount rather than the specific control scheme without consideration of the RESs participating in the frequency regulation.

With focus given to the overvoltage and overfrequency problems that simultaneously occur following an HVDC link block fault, this study considers an HVDC link block fault in a weak HVDC sending-end AC power system as a research scenario. A steady-state voltage security-constrained optimal frequency control method is then proposed. The overvoltage and overfrequency problems following the HVDC link block fault are first analyzed. Then, an optimization model that simultaneously considers frequency and steady-state voltage security constraints is established. The optimal frequency control scheme and additional dynamic reactive power compensation devices required can be obtained by solving the optimization model. The main contributions of this study are as follows.

1) A steady-state voltage security-constrained optimal frequency control method is proposed to obtain an optimal control scheme that satisfies system frequency and voltage security constraints simultaneously.

2) An integrated virtual inertia control of RESs is considered to provide frequency support and reduce the generation tripping amount and control cost.

3) The additional dynamic reactive power compensation required is optimized using the proposed optimization model, and the compensation points for additional dynamic reactive power compensation devices are determined through a voltage sensitivity analysis.

The remainder of this paper is organized as follows. Section II analyzes the overvoltage and overfrequency problems. Section III establishes an optimization model that simultaneously considers frequency and steady-state voltage security constraints. Section IV describes the solving method for the proposed optimization model and overall solution procedure. Section V presents the simulation results. Finally, Section VI concludes the study.

II. Analysis of Overvoltage and Overfrequency Problems

Figure 1 shows a schematic of weak HVDC sending-end AC power system, which represents a practical system with a high share of RESs in China. The RESs, including the WP and PV, are connected to the power system through converters. The wind generator considered is mainly a doubly-fed induction generator (DFIG) due to its mature technology and low cost.

Fig. 1  Schematic of weak HVDC sending-end AC power system.

A. Overvoltage Problem and Reactive Power Compensation

1) Overvoltage Problem

The overvoltage problems faced by AC power systems following an HVDC link block fault include transient and steady-state overvoltages. Figure 2 shows a schematic of the overvoltage problem following an HVDC link block fault.

Fig. 2  Schematic of overvoltage problem following an HVDC link block fault.

The normal voltage before the HVDC link block fault is U0, and the HVDC link block fault occurs at t0. The transient overvoltage Ut is caused by the untimely removal of reactive power compensation devices from the HVDC converter station, which often lasts for a short period of approximately 200 ms (t0-ts). Steady-state overvoltage Us derives from a change in power flow following an HVDC link block fault, which may be caused by a lessening or even reversal of the power flow in heavy-loaded transmission lines. The charging capacitance of the transmission line releases large amounts of capacitive charging power after the power flow reduction, causing steady-state overvoltage problems.

The transient overvoltage problem can be mitigated by installing synchronous condensers at the HVDC converter station [

32] and improving the high-voltage ride-through (HVRT) capabilities of RESs [33]. RESs with HVRT capabilities can continue to operate for approximately 500 ms under 1.3 p.u. voltage, which significantly reduces the risk of high-voltage disconnection of RESs. However, steady-state overvoltage, which is the overvoltage following system frequency recovery, lasts for a considerable period and results in severe harm to power equipment. The steady-state overvoltage is not only located near the HVDC converter station, but is also within the AC power system. Regarding voltage security, the main concern of this study is the steady-state overvoltage problem.

Frequency regulation measures following an HVDC link block fault, such as generation tripping and generator output active power adjustment, result in large-scale power flow changes in an AC power system. The system may face persistent steady-state overvoltage problems if reactive power control measures are not adopted. Therefore, formulating appropriate frequency regulation measures and coordinating them with a reactive power compensation scheme are necessary. To solve the overvoltage problem, we consider a steady-state voltage security constraint in the optimal frequency control method in Section III.

2) Dynamic Reactive Power Compensation

Dynamic reactive power compensation devices can effectively regulate the output inductive or capacitive reactive power to suppress steady-state overvoltage and simultaneously alleviate transient overvoltage.

Static var compensators (SVCs) are widely used to provide dynamic reactive power support and enhance system voltage security due to their advantages of providing fast-acting reactive power and good economy [

34]. In this study, an SVC is selected as the dynamic reactive power compensation device.

3) Identification of Compensation Points

Typically, the weak voltage points of an HVDC sending-end AC power system are established as the compensation points for dynamic reactive power compensation devices. Weak voltage points are identified using voltage sensitivity analysis.

Based on the power flow equation, the nth node voltage variation ΔVn in complete differential form is expressed as:

ΔVn=i=1NVnPiΔPi+i=1NVnQiΔQi (1)

where N is the number of system nodes; ΔPi and ΔQi are the active and reactive power variations of the ith node, respectively; Vn/Pi is the voltage-active power sensitivity of the voltage at the nth node to the injected active power at the ith node; and Vn/Qi is the voltage-reactive power sensitivity of the voltage at the nth node to the injected reactive power at the ith node.

The voltage sensitivity includes both voltage-active power sensitivity V/P and voltage-reactive power sensitivity V/Q, where V/Q reflects the effect of reactive power variation on the node voltage, and V/P reflects the influence of active power variation on the node voltage. The latter has little effect on determining the connection points of reactive power compensation devices. Therefore, using V/Q to determine the compensation points for additional reactive power compensation devices is effective.

The higher the value of V/Q, the more significant the effect of reactive power variation on node voltage. When the value of V/Q is stored, the nodes with high voltage-reactive power sensitivity are used as the weak voltage points, which are set as the best compensation points.

Section III describes how the optimal capacities required for dynamic reactive power compensation devices to mitigate the steady-state overvoltage are determined.

B. Overfrequency Problem and RES Participation in Frequency Regulation

1) Overfrequency Problem

Once an HVDC link block fault occurs, the large amount of surplus active power causes a frequency increase in the HVDC sending-end AC power system. The dynamic frequency characteristics of the system are analyzed based on the power balance swing equation as:

2HSsysfdfdt=Pm-PePm-PL+Pdc (2)

where f is the frequency of the system; H is the equivalent inertia time constant of the system; Ssys is the total capacity of the system; Pm and Pe are the equivalent mechanical and electromagnetic power, respectively; PL is the equivalent local load power; and Pdc is the HVDC transmitted power. Pe is approximately equal to the sum of PL and Pdc when the power loss is ignored.

When a large share of RESs replaces SGs, the proportion of SGs decreases. The total capacity of the system Ssys is assumed to be constant, that of the RESs is set as SRES, and the equivalent inertia time constant H is determined by:

H=i=1n'HiSbii=1n'Sbi+SRES=i=1n'HiSbiSsys (3)

where Hi is the inertia time constant of the ith SG; Sbi is the generation capacity of the ith SG; and n' is the remaining number of SGs.

Equation (3) shows that the equivalent inertia time constant of the system is reduced when the SGs are replaced by RESs, whereas (2) shows that the rate of change of frequency (RoCoF) of the weak HVDC sending-end AC power system with a high share of RESs will increase significantly following an HVDC link block fault. Figure 3 shows the system frequency response (SFR) for different inertia, where f0 is the normal frequency before the HVDC link block fault, and fnadir is the maximum frequency deviation.

Fig. 3  SFR for different inertia.

A low inertia causes a large RoCoF and the maximum frequency deviation fnadir following an HVDC link block fault. To deal with severe power disturbances such as HVDC link block faults, emergency control measures must be adopted in cooperation with the frequency regulation of remaining generators. A study of effective frequency control schemes is described in Section III.

2) RES Participation in Frequency Regulation

By improving the converter control of RESs, they can provide frequency support to participate in frequency regulation.

An integrated virtual inertia control consisting of droop control and virtual inertia control is attached to the outer control loop of an RES converter [

35]. The additional active power ΔPf provided by the integrated virtual inertia control is calculated as:

ΔPf=Kdfdfdt+KpfΔf (4)

where Kdf and Kpf are the virtual inertia control and droop control coefficients, respectively; and Δf is the frequency deviation.

Based on the RES participation in frequency regulation, both the generation tripping amount of emergency control and the control cost of system frequency regulation can be significantly reduced.

III. Proposed Optimization Model

Figure 4 shows the framework of the proposed steady-state voltage security-constrained optimal frequency control method.

Fig. 4  Framework of proposed steady-state voltage security-constrained optimal frequency control method.

Overfrequency generation tripping measures are performed for post-fault frequency recovery following an HVDC link block fault in cooperation with the frequency regulation of remaining SGs and RESs. With respect to the overvoltage problem, SVCs are applied to regulate the node voltage, and the compensation points for additional SVCs are determined through a voltage sensitivity analysis. An optimization model that simultaneously considers the frequency and steady-state voltage security constraints is constructed. The main challenges faced by the proposed method include the construction of an optimization model and its appropriate solution.

A. Objective Function

The objective function aims to minimize the comprehensive generation tripping and SVC investment costs. The total cost can be expressed as:

minf=iBSGξiΔPcut,i+jBRESξjΔPcut,j+kBCξkQC,k (5)

where ξi and ξj are the tripping costs of the ith SG and jth RES, respectively; ξk is the investment cost of the kth SVC; ΔPcut,i and ΔPcut,j are the tripping amounts of the ith SG and jth RES, respectively; and BSG, BRES, and BC are the sets of dispatched SGs, dispatched RESs, and additional SVCs, respectively.

B. Constraints

1) Active Power Tripping Amount Constraint

The tripping decision variable d, which represents the tripping state of the generator, is introduced. The definition of variable d can be given as:

d=0    the generator should be tripped off1    the generator should not be tripped off (6)

ΔPcut,i and ΔPcut,j can be expressed as:

ΔPcut,i=PG,i,01-diΔPcut,j=PG,j,0(1-dj) (7)

where PG,i,0 and PG,j,0 are the output active power of the ith SG and jth RES under normal conditions, respectively; and di and dj are the tripping decision variables of the ith SG and jth RES, respectively.

To ensure normal active power supply, the entire active power tripping amount ΔPcut should be less than the maximum tolerance limit ΔPcut,max.

ΔPcut=iBSGΔPcut,i+jBRESΔPcut,jΔPcut,max (8)

2) Spinning Reserve Capacity Constraint

The remaining unbalanced power ΔP after generation tripping is assumed by the remaining SGs and RESs.

ΔP=ΔPdc-ΔPcut (9)

where ΔPdc is the changing amount of HVDC transmitted power.

The remaining SGs and RESs should have sufficient spinning reserve capacities to ensure that the system frequency returns to the normal range. The spinning reserve capacities of the ith SG and jth RES are calculated as:

yi(PG,i,0-PG,i,min)di (10)
yj(PG,j,0-PG,j,min)dj (11)

where PG,i,min and PG,j,min are the lower limits of the output active power of the ith SG and jth RES, respectively.

The remaining SGs and RESs must satisfy the spinning reserve capacity constraint, which is expressed as:

iBSGyi+jBRESyjΔP (12)

3) Frequency Security Constraint

Following the remaining unbalanced power ΔP, the frequency deviates from the normal value. The system remaining inertia H', load damping D, unresected SGs, and RESs work together to suppress the frequency deviation.

The generalized conventional SFR model describing the contribution of each SG to system frequency control is presented in [

36]. With the tripping decision variables and frequency support of RESs introduced into the generalized conventional SFR model, an extended multi-machine SFR model is proposed, as shown in Fig. 5.

Fig. 5  Extended multi-machine SFR model.

The nature of RES-integrated virtual inertia control is a power response. Accordingly, the RESs do not actually contribute to the system equivalent inertia. When the tripping decision variables are considered, the remaining inertia H' is determined by:

H'=i=1mHiSbidii=1mSbidi+j=1nSrjdj=i=1mHiSbidiSSG+SRES (13)

where m and n are the numbers of SGs and RESs, respectively; Srj is the generation capacity of the jth RES; and SSG is the total capacity of the remaining SGs.

As the system frequency deviation Δf is insensitive to the governor time constant Ti, all SGs are assumed to have the same governor time constant value T [

37]. Then, the analytical expression for the frequency deviation can be constructed based on the extended multi-machine SFR model as:

Δf(s)=ΔPs12H's+D+i=1mKiRi1+FiTs1+Tsdi+j=1nKdfjs+Kpfjdj (14)

where Ki and Ri are the mechanical power gain factor and equivalent regulation constant of the ith SG, respectively; Fi is the fraction of the total power generated by the ith SG; and Kdfj and Kpfj are the virtual inertia control and droop control parameters of the jth RES, respectively.

Equation (14) can then be rewritten as:

Δf(s)=ΔP2H'+HRTs1+Tss2+2ξωns+ωn2 (15)
ωn=12H'+HRTD+RR+KR (16)
ξ=122H'+HR+TD+FR+KR2H'+HRTD+RR+KR (17)
FR=i=1mKiRiFidi (18)
RR=i=1mKiRidi (19)
HR=j=1nKdfjdj (20)
KR=j=1nKpfjdj (21)

Then, Δft in the time domain can be derived through the inverse Laplace transform, expressed as:

Δft=ΔP2H'+HRTωn21-11-ξ2e-ξωntcosωn1-ξ2t-ϕ+ΔP2H'+HRωn1-ξ2e-ξωntsinωn1-ξ2t (22)
ϕ=arctanξ1-ξ2 (23)

When the extreme point of Δft is found through differentiation, the analytical value of the maximum frequency deviation Δfmax and corresponding time instant tm can be calculated as:

Δfmax=ΔPD+RR+KR1+e-ξωntmTRR+KR-FR2H'+HR (24)

To maintain frequency security, Δfmax should not exceed the allowable maximum frequency deviation limit Δfmax,set. Accordingly, its value is generally set to be 0.5 Hz. The following frequency security constraints then must be satisfied.

-Δfmax,setΔfmaxΔfmax,set (25)

4) Voltage Security Constraint

The voltage magnitudes of all the nodes must not exceed the specified upper and lower voltage security limits:

Vn,minVnVn,max    nBN (26)

where BN is the set of system nodes; and Vn,min and Vn,max are the lower and upper voltage security limits of the nth node, respectively.

5) Generator Output Constraint

The outputs of all generators should not exceed their allowed active and reactive power limits:

PG,i,minPG,iPG,i,max     iBGQG,i,minQG,iQG,i,max    iBG (27)

where BG is the set of generators including all SGs and RESs; PG,i,min and PG,i,max are the lower and upper output active power limits of the ith generator, respectively; and QG,i,min and QG,i,max are the lower and upper output reactive power limits of the ith generator, respectively.

6) Line Power Flow Constraint

The power flow of each line following power redistribution should not exceed the allowable power flow limit.

SlSl,max    lBl (28)

where Bl is the set of lines; and Sl,max is the allowable power flow limit of the lth transmission line.

7) Power Equilibrium Constraint

The optimization model should also satisfy the primary power equilibrium constraints:

PG,i,n+PG,j,n-PL,n-PnV,δ=0QG,i,n+QG,j,n-QL,n-QnV,δ+QC,k,n=0 (29)

where PG,i,n and PG,j,n are the active power of the ith SG and jth RES at the nth node, respectively; QG,i,n and QG,j,n are the reactive power of the ith SG and jth RES at the nth node, respectively; PL,n and QL,n are the active and reactive loads at the nth node, respectively; PnV,δ and QnV,δ are the injected active and reactive power at the nth node, respectively, which are the functions of voltage magnitude V and phase angle δ; and QC,k,n is the output reactive power of the additional SVC at the nth node.

IV. Solving Method for Proposed Optimization Model and Overall Solution Procedure

A. Solving Method for Proposed Optimization Model

The proposed optimization model can be simplified to the following genetic expression:

minfx,us.t.  hx,u=0       gmingx,ugmax (30)

where x and u are the dependent and control variables, respectively; fx,u is the objective function; hx,u and gx,u represent the equality and inequality constraints, respectively; and gmin and gmax are the lower and upper limits of the inequality constraint, respectively. In the proposed optimization model, the dependent variables refer to the node voltage, whereas the control variables include the tripping decision variables, generator output power, and SVC compensation. Note that fx,u is represented by (5), hx,u by (29), and gx,u by (8), (12), and (25)-(28).

The proposed optimization model is a typical mixed-integer nonlinear programming model containing continuous and integer variables. The branch-and-bound (B&B) method is the most fundamental for obtaining a global solution to an integer programming problem [

38]. In addition, the primal dual interior point method (PDIPM) can effectively solve nonlinear programming problems [39]. This study combines the two methods to solve the proposed optimization model.

B. Overall Solution Procedure

Figure 6 shows a flow of the solution procedure, which consists of the following three steps.

Fig. 6  Flow of solution procedure.

Step 1:   input the parameter information, including the system topology structure data, equipment parameters (SGs, RESs, and SVCs), and algorithm parameters (the maximum iteration number and initial parameter values).

Step 2:   detect the system frequency after an HVDC link block fault and determine whether the frequency meets the operational requirements. If the detected system frequency exceeds the allowable range, voltage sensitivity analysis is conducted to identify the compensation points for the SVCs.

Step 3:   solve the proposed optimization model using an algorithm that combines the B&B method and PDIPM. If it cannot satisfy all the constraints in the solving process, the optimization model is solved again after reactive power control nodes are added and until it meets the convergence condition. The optimal results include the tripping decision variables di and dj, active and reactive power outputs of generators PG,i and QG,i, and additional reactive power compensation capacity QC,k.

V. Simulation Result

Several simulations are conducted on a modified IEEE 9-bus test system and a practical Qing-Yu line commutated converter based HVDC (LCC-HVDC) system to verify the effectiveness of the proposed method. The algorithm for the proposed optimization model is programmed using MATLAB 2018a software. Dynamic simulations of both frequency and voltage evolution are performed using PSCAD/EMTDC software.

A. Modified IEEE 9-bus system

The modified IEEE 9-bus system consists of three SGs and five RESs (WP1, WP2, and PV1-PV3), and its structure is shown in Fig. 7. The total capacities of the SGs and RESs are 200 MW and 120 MW, respectively, and the penetration rate of RESs is approximately 37.5%. The parameters of the modified IEEE 9-bus system are found in [

40]. An active load of 125 MW at Bus 5 represents the HVDC transmission power. Removal of the active load can simulate an HVDC link block fault.

Fig. 7  Modified IEEE 9-bus system.

Tables I and II list the dynamic control parameters of the SGs and the parameters of RES-integrated inertia control.

TABLE I  Control Parameters of SGs
SGHi (s)DiTi (s)KiRiFi
SG1 7.0 2.0 8 0.90 0.04 0.15
SG2 5.5 1.5 8 0.95 0.05 0.35
SG3 4.5 1.0 8 0.98 0.03 0.25
TABLE II  Parameters of RES-integrated Inertia Control
RESKdfjKpfj
PV1 30 12
PV2 30 10
PV3 25 8
WP1 35 15
WP2 30 10

In the proposed optimization model, the tripping costs ξi of SGs and ξj of RESs are set to be 0.08 M$/MW and 0.006 M$/MW, respectively. The investment cost ξk of SVC is set to be 0.1 M$/Mvar. The limit of node voltage magnitude is in the range of 0.95-1.05 p.u.. The maximum optimization iteration times is set to be 50.

In the initial state, both the system frequency and all node voltages operate within a safe range. Then, the active load of 125 MW at Bus 5 is removed to simulate the HVDC bipolar block fault, and the system frequency increases sharply.

An optimal control scheme is obtained using the proposed method. The system must trip SG1, WP2, and PV3 to ensure that the frequency satisfies the operational requirements. At the initial steady state, the output active power of SG1, WP2, and PV3 is 42, 40, and 25 MW, respectively. Thus, the total capacity of generation trips is 107 MW. In addition, the remaining surplus active power of 18 MW is shared by the frequency regulation of the remaining SG2, SG3, PV1, PV2, and WP1. To ensure all node voltages are within the operational limit, SVC is required at Bus 4 through voltage sensitivity analysis, and the SVC must absorb approximately -97 Mvar reactive power. The SVC investment and comprehensive generation tripping costs are 9.7 M$ and approximately 3.75 M$, respectively. The total cost is 13.45 M$.

Next, four scenarios with different control strategies are designed to compare the control effects.

Scenario 1: no control measures are adopted.

Scenario 2: the traditional generation tripping strategy [

14] is adopted without considering RESs participating in the frequency regulation and voltage security constraints.

Scenario 3: a frequency control strategy is adopted that considers RESs participating in frequency regulation without considering the voltage security constraints or reactive power compensation. In other words, constraint (26) is removed from the optimization model.

Scenario 4: the proposed method is implemented.

The dynamic processes of the system frequency and voltages of main nodes in the four scenarios are verified through dynamic simulations. At 10.0 s, an HVDC link block fault occurs. At 10.2 s, overfrequency generation tripping operations are performed based on the optimization results. Figure 8 shows the frequency dynamic response curves in the four scenarios.

Fig. 8  Frequency dynamic response curves in four scenarios.

In Scenario 1, the maximum frequency reaches 51.67 Hz, which significantly exceeds the maximum frequency deviation limit.

In Scenario 2, the generators (SG2 and WP2) near the HVDC converter station are tripped. The output active power of SG2 is 79 MW, whereas that of WP2 is 40 MW. The maximum frequency of the system following the HVDC link block fault is 50.46 Hz, which is within the frequency operating range. There is no reactive power compensation investment cost because this scenario does not consider the voltage security constraint. The control cost is the generation tripping cost, which is approximately 6.56 M$. Figure 9 shows the variations in output active power of the remaining SGs and RESs in Scenario 2.

Fig. 9  Output active power of remaining generators in Scenario 2. (a) Output active power of remaining SGs. (b) Output active power of remaining RESs.

The output active power of the remaining RESs remains practically unchanged. Only the remaining SG1 and SG3 reduce the output active power through primary frequency regulation to share the remaining unbalanced power following generation tripping.

In Scenario 3, the total capacity for generation tripping is approximately 107 MW, which accounts for approximately 3.75  M$ in generation tripping costs. The remaining SG2, SG3, PV1, PV2, and WP1 participate in frequency regulation. The maximum frequency following an HVDC link block fault is 50.35 Hz, which is lower than that in Scenario 2. Compared with Scenario 2, Scenario 3 has a significantly lower generation tripping cost but achieves better frequency control effects. Figure 10 shows the variations in output active power of the remaining SGs and RESs in Scenario 3.

Fig. 10  Output active power of remaining generators in Scenario 3. (a) Output active power of remaining SGs. (b) Output active power of remaining RESs.

As Fig. 10(a) shows, the remaining SG2 and SG3 reduce the output active power through primary frequency regulation. As Fig. 10(b) shows, the RESs can effectively participate in frequency regulation after the active power control is considered.

However, because the voltage security constraint is not considered in Scenario 3, overvoltage problems following an HVDC link block fault are prominent. Figure 11 shows the dynamic voltage curves of the main buses in Scenario 3.

Fig. 11  Dynamic voltage curves of main buses in Scenario 3.

In the system, overvoltage problems occur when voltage security constraints are not considered. All node voltages following an HVDC link block fault exhibit an apparent upward trend. The transient voltage at the HVDC fault point can reach 1.31 p.u. instantaneously, and the steady-state voltage can even reach 1.104 p.u., which far exceeds the upper voltage limits.

In Scenario 4, the frequency control strategy is the same as that in Scenario 3, and the maximum frequency following an HVDC link block fault is approximately 50.35 Hz. An additional SVC is added at Bus 4 to absorb approximately -97 Mvar reactive power in this scenario. The steady-state voltages of all nodes are then within the allowed operating range. Figure 12 shows the dynamic voltage curves of the main buses in Scenario 4.

Fig. 12  Dynamic voltage curves of main buses in Scenario 4.

Because the compensation devices in HVDC converter stations are usually cut off after a delay of approximately 200 ms, a transient overvoltage problem is inevitable. Next, we amplify and compare the transient overvoltage at the HVDC fault point in Scenarios 3 and 4. Figure 13 shows enlarged details of the transient overvoltage of the HVDC fault point in the two scenarios.

Fig. 13  Enlarged details of transient overvoltage of HVDC fault point in Scenarios 3 and 4.

The peak value of transient overvoltage in Scenario 3 is 1.31 p.u.. By contrast, in Scenario 4, it is 1.21 p.u., which proves that the additional SVCs clearly help to reduce transient overvoltage.

B. Case Study on Practical Qing-Yu LCC-HVDC System of China

The Qinghai-Henan ±800 kV LCC-HVDC project of China, referred to as the Qing-Yu HVDC project, has a transmission distance of 1563 km and a rated capacity of 8 GW. Figure 14 shows the network of a practical Qing-Yu LCC-HVDC sending-end AC power system.

Fig. 14  Network of practical Qing-Yu LCC-HVDC sending-end AC power system.

The Qing-Yu LCC-HVDC sending-end AC power system gathers a large amount of WP and PV power. The RESs are mainly connected at the “Tala” and “Hele” stations, as shown in the circled area in Fig. 14. The sending-end AC power system is designed to build 10 GW of PV power, 4 GW of WP, and 1.4 GW of supporting hydropower. The installed capacities of clean and renewable energy account for 90.83% and 61.36%, respectively. Therefore, the Qing-Yu LCC-HVDC sending-end AC power system is a typical weak LCC-HVDC sending-end AC power system.

When a bipolar block fault occurs at the Qing-Yu HVDC link at 5.0 s, 8.0 GW active power is blocked. The proposed method is used to determine the optimal frequency control and additional reactive power compensation. To ensure that the system frequency meets operational requirements, the system must trip 3.2 GW PV power at the “Hele” station and 2.2 GW PV power and 1.1 GW WP at the “Tala” station. Surplus active power of 1.5 GW is shared by the frequency regulation of the remaining generators. In addition, based on voltage sensitivity analysis, the best installation locations for SVCs are the “Hele” and “Tala” stations. The SVC at the “Hele” and “Tala” stations must absorb -1341 Mvar and -719 Mvar reactive power, respectively. It can then ensure that the voltages of nodes operate within their allowed ranges.

The dynamic frequency responses of the following three scenarios for Qing-Yu LCC-HVDC sending-end AC power system are compared. In Scenario 5, the optimal frequency control scheme is adopted without considering voltage security constraints or reactive power compensation. In Scenario 6, the traditional frequency control method [

14] is adopted to trip generators near the HVDC converter station. In Scenario 7, the proposed method is implemented. An HVDC bipolar block fault occurs at 5 s, and generation tripping operations are performed after a delay of 200 ms. Figure 15 shows the dynamic frequency responses in the three scenarios.

Fig. 15  Dynamic frequency responses in three scenarios.

The system frequency prior to the HVDC link block fault is 50.01 Hz. When a bipolar block fault occurs at the Qing-Yu HVDC link at 5 s, the protection devices perform a generation tripping scheme according to the optimization results at 5.2 s.

In Scenarios 5 and 7, approximately 3.2 GW PV power at the “Hele” station and 2.2 GW PV power and 1.1 GW WP at the “Tala” station are tripped. The remaining surplus active power of 1.5 GW is shared by frequency regulation of the remaining SGs and RESs in the system. The comprehensive generation tripping cost is approximately 39 M$. The post-fault frequency following an HVDC link block fault in both Scenarios 5 and 7 is approximately 50.48 Hz, which is within the frequency operating range. In Scenario 2, approximately 0.6 GW hydroelectric power and 4.8 GW PV power at the “Hele” station and 0.8 GW hydroelectric power and 1.1 GW WP at the “Tala” station must be tripped. The maximum frequency following an HVDC link block fault in Scenario 2 is approximately 50.35 Hz due to the overcutting of 0.8 GW power generation. The generation tripping cost is 147.4 M$, which significantly increases the generation tripping cost compared with Scenarios 5 and 7.

Figure 16 shows the output active power variation of a removed PV power unit at the “Hele” station.

Fig. 16  Output active power variation of a removed PV power unit.

The voltage of most nodes is out of the security limit in Scenario 5. In addition, the steady-state voltages for the “Hele” and “Tala” stations even exceed 1.1 p.u., where the voltage eligibility rate is only 42.8%. Figure 17 shows the voltage variations of main nodes in Scenario 5.

Fig. 17  Voltage variations of main nodes in Scenario 5.

In Scenario 6, to restore the node voltages within their allowed ranges, approximately -1490 and -638 Mvar SVC at the “Hele” and “Tala” stations, respectively, are needed. The SVC investment cost is 212.8 M$, and the total cost in this scenario is 360.2 M$. By contrast, in Scenario 7, approximately -1341 and -719 Mvar SVC at the “Hele” and “Tala” stations, respectively, are needed to maintain the voltages of nodes operating within their allowed ranges. The total cost is 245 M$, of which 206 M$ is the SVC investment cost. All steady-state node voltages in Scenarios 6 and 7 are within the allowed operating range after the voltage security constraints are considered. Figure 18 shows the main node voltage variations in Scenario 7.

Fig. 18  Voltage variations of main nodes in Scenario 7.

The peak value of transient overvoltage in Scenario 5 is 1.349 p.u., whereas in Scenario 7, it is 1.171 p.u., which proves that the additional SVCs can also have a good effect on alleviating the transient overvoltage problem.

The frequency control schemes and control effects of the three scenarios are compared and summarized in Table III.

TABLE III  Comparison of Three Scenarios
ScenarioTripping schemeReactive power compensationΔfmax (Hz)Voltage eligibility rate (%)Total cost (M$)
5 Hele: 3.2 GW PV; Tala: 2.2 GW PV, 1.1 GW WP Without SVCs 0.46 42.8 39.0
6 Hele: 4.8 GW PV, 0.6 GW SG; Tala: 1.1 GW WP, 0.8 GW SG Hele: -1490 Mvar; Tala: -638 Mvar 0.35 100.0 360.2
7 Hele: 3.2 GW PV; Tala: 2.2 GW PV, 1.1 GW WP Hele: -1341 Mvar; Tala: -719 Mvar 0.46 100.0 245.0

The comparative results show that Scenarios 5 and 7 employ the same generation tripping scheme. Without considering the voltage security constraint in Scenario 5, the voltage eligibility rate is only 42.8%. The proposed method in Scenario 7 adds a minimum reactive power compensation, which realizes a 100% voltage eligibility rate. The total cost in Scenario 7 is 115.2 M$ less than that in Scenario 6. The proposed method can simultaneously achieve the expected control effect for both frequency and voltage.

C. Discussion

Simulations conducted on a modified IEEE 9-bus test system and a practical Qing-Yu LCC-HVDC sending-end AC power system show that the proposed method can achieve a frequency deviation of no greater than 0.5 Hz and a 100% voltage eligibility rate following an HVDC link block fault. However, the optimal frequency control method without considering the steady-state voltage security constraint in Scenario 5 has only a 42.8% voltage eligibility rate, and the traditional frequency control method in Scenario 6 causes overcutting of 0.8 GW power generation, as shown in the Qing-Yu LCC-HVDC sending-end AC power system.

The limitations and drawbacks of the proposed method are that additional dynamic reactive power compensation devices such as SVCs, which are considered in this study, are required to solve overvoltage problems. This results in additional investment costs and increases the comprehensive cost. However, the additional reactive power compensation cost is expected to be reduced further through coordinated control between the RESs and additional reactive power compensation devices. This coordinated control problem should be studied further.

VI. Conclusion

Focusing on the practical overvoltage and overfrequency problems resulting from an HVDC link block fault in a weak HVDC sending-end AC power system, this study proposed a steady-state voltage security-constrained optimal frequency control method. Simulation studies verify the effectiveness of the proposed method, and the following characteristics are revealed.

1) The proposed method achieves a frequency deviation of no greater than 0.5 Hz and 100% voltage eligibility rate following an HVDC link block fault.

2) The integrated virtual inertia control of RESs reduces the generation tripping amount. Simulation studies verify that RESs participating in frequency regulation can effectively reduce control costs.

3) The additional dynamic reactive power compensation devices not only effectively solve the steady-state overvoltage problem but also have a certain effect on transient overvoltage alleviation.

In future research, the regulation potentials will be further explored by considering the reactive power coordination control between the RESs and required additional reactive power compensation devices. This will enable further reduction in the cost of the additional dynamic reactive power compensation required.

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