Abstract
Earlier studies have reported some calculation methods for commutation failure fault level (CFFL) in line-commutated-converter based high-voltage direct current (LCC-HVDC) system under single-line-to-ground (SLG) faults. The accuracy of earlier methods is limited because they only consider the commutating voltage drop and phase shift, while neglecting the DC current variation. Hence, this paper proposes a CFFL calculation method under SLG faults considering DC current variation, for better planning and designing of LCC-HVDC systems. First, the fault commutating voltage magnitude and phase shift are calculated. Then, the fault DC voltage during different commutation processes is deduced. Based on the commutating voltage magnitude and phase shift, and DC voltage during different commutation processes under SLG faults, the characteristics of CFFL with different fault time are demonstrated and analyzed. Next, the transient time-domain response of the DC current after the fault is obtained based on the DC transmission line model. Discrete commutation processes are constructed based on the commutation voltage-time area rule to solve the extinction angle under different fault levels and fault time. Finally, the CFFL is calculated considering the fault time, commutating voltage drop, phase shift, and DC current variation. The accuracy of the proposed method compared with the traditional method is validated based on the CIGRE benchmark model in PSCAD/EMTDC.
THE line-commutated-convert-based high-voltage direct current (LCC-HVDC) system is widely used for bulk power transmission between load center and energy resources due to its large transmission capacity, low power losses, and low cost [
The mechanism and influencing factors of CF have been thoroughly investigated over the past decades. Reference [
In this paper, a CFFL calculation method for LCC-HVDC under SLG faults considering the DC current variation is proposed. Firstly, the commutating voltage drop and phase shift are calculated by using sequence component decomposition of the LCC-HVDC system. Then, the DC voltage during different CPs is deduced, and the transient time-domain response of DC current after fault is obtained. The CF characteristic under SLG faults is further elaborated based on simulation results. Finally, the discrete CPs are constructed, and then the extinction angle under different fault levels and fault time is solved to determine the CF occurrence.
This paper is organized as follows. In Section II, based on the commutating voltage calculation and the DC voltage calculation after fault, the characteristic of CFFL under SLG faults is analyzed. Then, Section III describes the proposed method for CFFL calculation. In Section IV, lots of simulations on the CIGRE benchmark HVDC model are carried out to verify the effectiveness of the proposed method. Finally, Section V concludes this paper.
For a 12-pulse converter used in LCC-HVDC, there are 12 CPs in one cycle T. The CPs and the corresponding commutating voltage are shown in Appendix A Fig. A1, where is the discrete CP in order, starting from the one commutated by around 1.5 s in the CIGRE benchmark model.
Assuming that an SLG fault occurs in phase a, the commutating voltage amplitude and phase shift can be calculated by decomposing the inverter-side AC system into positive-, negative-, and zero-sequence components [
(1) |
(2) |
(3) |
(4) |
where Uj and (j=acY, baY, cbY, acD, baD, cbD, ...) are the commutating voltage magnitude and phase shift corresponded in Appendix A Table AI, respectively; is the equivalent voltage looking into the AC grid from inverter buses; and , , is the fault impedance, and are the zero- and positive-sequence equivalent impedances looking into the AC grid from inverter buses, respectively. In this paper, the fault impedance is assumed to be fault resistance .
Based on (1)-(4), the relationships between fault resistance and commutating voltage magnitude U and phase shift during different CPs, i.e., and , are shown in

Fig. 1 Commutating voltage magnitude during different CPs.

Fig. 2 Commutating voltage phase shift during different CPs.
Considering that the DC voltage is also affected by faults, the fault DC voltage during different CPs needs to be further calculated.
For example, during CP10, the DC voltage of inverter at Y/Y transformer-side can be calculated as the average value during the T/6 starting from the beginning of CP10.
(5) |
where ucaY(t) and ubaY(t) are the commutating voltages; is the firing angle; is the angular frequency; and is the overlap angle.
During CP10, we have:
(6) |
where L is the equivalent commutation inductance; and are the voltages of phases a and b, respectively; and is the valve current.
Substituting (6) into (5), together with the boundary condition of CP, the DC voltage of the inverter at Y/Y transformer-side can be calculated as:
(7) |
where is the extinction angle; and is the equivalent commutation reactance.
During this T/6 period, the DC voltage variation during CP can be expressed by the DC current in (7), and the DC voltage variation during the non-CP can be expressed by the AC voltage UcaY in (7). Considering the DC voltage of the inverter at Y/Y transformer-side and Y/D transformer-side together, the DC voltage of the inverter can be calculated as:
(8) |
The detailed AC voltage during non-CP is shown in Appendix A Fig. A1 and Table AI. Taking CP1 for example, the AC voltage is UabY when UdY is calculated, and the AC voltage is UcbD when UdD is calculated. Based on (8), the DC voltages during different CPs are shown in

Fig. 3 DC voltages during different CPs.
The quasi-state equation of extinction angle is expressed as:
(9) |
As shown in (9), the extinction angle calculation should consider the DC current as well as the commutating voltage magnitude and phase shift. Neglecting the DC current variation, as in the traditional method, will lead to a significant error in extinction angle calculation, resulting in a conservative value for the calculated CFFL.
Numerous simulations under different fault levels and fault time are carried out, and the CPs with the first CF are recorded, as shown in

Fig. 4 Relationship of CP with first CF and fault time by simulation results.
As can be observed from
Furthermore, if we only consider the commutating voltage drop and phase shift, the CFFL of a certain CP should remain unchanged when the fault time is before this CP. However, as can be observed from
The discrete CPs are shown in order in

Fig. 5 Schematic diagram of discrete CPs.
The fault commutating voltage can be obtained by (1) and (2). The fault DC voltage can be obtained by (8). In addition, the fault DC current needs to be calculated.
The equivalent circuit of DC transmission line is shown in

Fig. 6 Equivalent circuit of DC transmission line.
Considering the DC inductance and the DC capacitor, the inverter-side DC current response in frequency domain and time domain can be calculated as:
(10) |
where ; ; is the voltage of the equivalent capacitor before the fault; and are the DC currents before the fault; is assumed to be unchanged; and is the time-domain DC current calculated by the mathematic inversion based on the frequency-domain DC current. Similarly, the capacitor voltage can be calculated as well.
Due to different fault time, the DC current time response can be rewritten as:
(11) |
where IdN is the rated DC current.
Once the fault commutating voltage and DC current response have been calculated, we can construct discrete CPs based on voltage-time area rule to solve the corresponding extinction angle.
When , the fault occurs before CP1 start, and the supply voltage-time area of CP1 can be calculated as:
(12) |
where is the firing angle of CP1.
When , the fault occurs during CP1, and the supply voltage-time area of CP1 can be divided into pre- and after-fault parts, and can be calculated as:
(13) |
where UcN is the rated commutating voltage.
Similarly, when the fault time is during CPi, the supply voltage-time area of CPi is determined by the rated commutating voltage and the fault commutating voltage.
Meanwhile, the demand voltage-time area of CP1 can be calculated as:
(14) |
In the traditional method, the DC currents at the start and end time of CP1 in (14) remain the rated DC current IdN.
The overlap angle of CP1 can be solved by making the transcend equation of (12) or (13) equal to (14). Then, can be calculated as:
(15) |
where 1 is the phase shift of CP1, i.e., .
Similarly, we can also construct and calculate CP2. Based on the DC current and the capacitor voltage at the beginning of CP2, the time-domain DC current after CP2 starts can be recalculated as:
(16) |
To lessen the calculation burden, can be assumed as . Similarly, the capacitor voltage can be calculated as well.
The supply voltage-time of CP2 can be calculated as:
(17) |
Meanwhile, the demand voltage-time area of CP2 can be calculated as:
(18) |
Similarly, in the traditional method, the DC currents at the start and end time of CP1 in (18) remain the rated DC current IdN.
The overlap angle of CP2 can be solved by making the transcend equation of (16) equal to (18). Then, the extinction angle of CP2 can be calculated as:
(19) |
where is the phase shift of CP2, i.e., .
The extinction angle of subsequent CPs can also be calculated, similar to (17)-(19), and then compared with the minimum extinction angle to determine the occurrence of CF. Furthermore, considering the effect of constant extinction angle controller after the fault, we assume that there is no CF risk after 6 CPs. If the fault time is around CP3, CP9 and the following CPs have zero CF risk.
The flowchart of the proposed method and traditional method is shown in

Fig. 7 Flowchart of proposed method and traditional method.
The DC current variation calculation, which is enclosed in the red dotted line, is not included in the traditional method. Initially, the fault time and the initial value of the fault resistance Rf0, which is larger than the actual critical fault resistance, are input into the proposed method. Then, the fault commutating voltage magnitude and phase shift, as well as the fault DC voltage, are calculated. The transient DC current is then calculated. The supply voltage-time area and demand voltage-time area are calculated to determine the extinction angle of CP1. If the calculated extinction angle is less than the minimum extinction angle, the fault resistance is recorded as the critical fault resistance. If the calculated extinction angle is greater than the minimum extinction angle, the extinction angle of CP2 and subsequent CPs are calculated and compared with the minimum extinction angle, as described above. If the calculated extinction angle of CP6 is still greater than the minimum extinction angle, it indicates no CF risk at this fault level. The value of Rf is then decreased for the next round of calculation until the occurrence of CF, which means the calculated extinction angle should be less than the minimum extinction angle.
To validate the effectiveness of the proposed method, lots of simulations have been performed in the CIGRE benchmark HVDC model based on the PSCAD/EMTDC. The simulation step is 10 .

Fig. 8 Simulation waveforms under SLG fault. (a) DC current. (b) Extinction angle. (c) Firing angle. (d) Valve current of Y/D transformer.
As shown in
Using the same simulation parameters, the CFFL calculated by the proposed method and the traditional method is around 163 and 84 , respectively. The improved accuracy of the proposed method is mainly attributed to the DC current variation calculation.
To better evaluate both the proposed method and the traditional method, lots of calculations and simulations are performed with varying fault initiation time tf from 1.500 s to 1.510 s, with a step size of s. The simulation results are presented in

Fig. 9 Calculation results of traditional method.

Fig. 10 Calculation results of proposed method.
As can be observed from
However, when the fault time is during CP3 or CP4, the proportion of voltage-time area supplied by the fault commutating voltage decreases as the fault time passes, resulting in a smaller proportion of after-fault supply voltage-time area in (13). Therefore, CF only occurs with more severe faults as the fault time approaches the end of CP3 or CP4. Moreover, the calculation error of CFFL using the traditional method is noticeable, with an error of 45% at 1.500 s. The results of traditional method are always smaller than the simulation results because the traditional method neglects the increment of DC current.
As shown in
To better compare the accuracy of the traditional method and the proposed method, we have calculated the following indices: mean absolute error (MAE), mean absolute percentage error (MAPE), and root mean squared error (RMSE). MAE is a measure of the average distance between simulation results and calculation results. MAPE is a relative measure that scales MAE to be in percentage units. RMSE is the standard deviation of the residuals. The calculations of these indices are shown in (20)-(22), respectively.
(20) |
(21) |
(22) |
where Rfs and Rfc are the simulation and calculation results, respectively.
The smaller the values of MAE, MAPE, and RMSE are, the more accurate the calculation method is. The indices are shown in
Method | MAE (Ω) | MAPE (p.u.) | RMSE (Ω) |
---|---|---|---|
Traditional | 82.57 | 0.473 | 91.43 |
Proposed | 50.16 | 0.287 | 66.70 |
As shown in
In this paper, a CFFL calculation method that considers DC current variation in LCC-HVDC system under SLG faults is proposed. The proposed method is validated with lots of simulation results from the CIGRE benchmark model built in PSCAD/EMTDC, and it can be concluded as follows.
1) The proposed method achieves greater accuracy in calculating CFFL under SLG faults than the traditional method, due to the consideration of DC current variation.
2) However, the proposed method still exhibits noticeable errors under certain conditions. Further investigation is required to account for the impact of factors such as harmonic voltage, LCC-HVDC control system, and dynamic interaction between AC and DC systems when calculating CFFL.
Appendix
In Fig. A1, iVn is the current flowing through valve n Vn (); and the subscripts D and Y represent the variables at Y/D and Y/Y transformers, respectively.

Fig. A1 CPs demonstration. (a) Twelve-pulse converter at inverter side. (b) CPs in order.
Commutation process | Transformer | Commuting voltage | DC voltage (before CP) |
---|---|---|---|
V1D-V3D (CP11) | Y/D | UbaD | UcaD |
V3D-V5D (CP3) | UcbD | UabD | |
V5D-V1D (CP7) | UacD | UbcD | |
V2D-V4D (CP1) | UcaD | UcbD | |
V4D-V6D (CP5) | UabD | UacD | |
V6D-V2D (CP9) | UbcD | UbaD | |
V1Y-V3Y (CP10) | Y/Y | UbaY | UcaY |
V3Y-V5Y (CP2) | UcbY | UabY | |
V5Y-V1Y (CP6) | UacY | UbcY | |
V2Y-V4Y (CP12) | UcaY | UcbY | |
V4Y-V6Y (CP4) | UabY | UacY | |
V6Y-V2Y (CP8) | UbcY | UbaY |
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