Abstract
This paper proposes a fault ride-through hybrid controller (FRTHC) for modular multi-level converter based high-voltage direct current (MMC-HVDC) transmission systems. The FRTHC comprises four loops of cascading switching control units (SCUs). Each SCU switches between a bang-bang funnel controller (BBFC) and proportional-integral (PI) control loop according to a state-dependent switching law. The BBFC can utilize the full control capability of each control loop using three-value control signals with the maximum available magnitude. A state-dependent switching law is designed for each SCU to guarantee its structural stability. Simulation studies are conducted to verify the superior fault ride-through capability of the MMC-HVDC transmission system controlled by FRTHC, in comparison to that controlled by a vector controller (VC) and a VC with DC voltage droop control (VDRC).
MODULAR multi-level converter based high-voltage direct current (MMC-HVDC) is becoming an increasingly attractive solution for long-distance high-voltage power transmission [
This study focuses on the MMCs with half-bridge SMs. Owing to its easy implementation and decoupled control of active and reactive power, the vector controller (VC) is widely used for MMC controllers [
The linear controllers [
The nonlinear controllers have also been designed to improve the fault ride-through performance of MMC-HVDC transmission systems over the last decade. The output feedback linearization method is employed in [
In addition to the above limitations, the existing control methods [
In this paper, a fault ride-through hybrid controller (FRTHC) is proposed to improve the fault ride-through performance of MMC-HVDC transmission systems. The highlights of this paper can be summarized as follows. First, a switching control unit (SCU) with a modular structure is proposed, which can be utilized individually or in combination with another SCU in any control loop of the MMC. The application of a BBFC enables the SCU to explore more control energy of the MMC than continuous controllers do. Second, a state-dependent switching law is proposed for the SCU. Based on the switching law, the BBFC and PI control loops of the SCU operate in a switched manner, and the time delays are implemented to guarantee the stable switching between the two controllers. Third, the simulation studies are conducted to investigate the performance of MMC-HVDC transmission systems controlled by FRTHC via electromagnetic and electromechanical transient simulations.
This paper mainly focuses on the control of MMCs under the three-phase metallic AC grid faults. This type of fault is the most serious line-to-ground fault encountered by MMCs, under which the current flowing through the fault point is the largest. This probably leads to a collapse of the voltage and frequency of the entire power system. This paper also considers the fault ride-through control of the MMC-HVDC under the AC asymmetrical fault. The asymmetric fault is another major cause of oscillation or instability in power systems with MMC-HVDC transmission lines.
The remainder of this paper is organized as follows. The model of the MMC-HVDC transmission system is introduced in Section II. In Section III, BBFCs are designed for SCUs in each control loop of FRTHC for rectifier-side and inverter-side MMCs. Section IV presents the switching laws designed for SCUs of an FRTHC system. The results of the simulation and modal analysis are presented in Section V. Based on the results of the simulation and modal analysis, conclusions are presented in Section VI.
An MMC-HVDC transmission system primarily comprises a rectifier-side MMC, an inverter-side MMC, and their control systems. The schematic of per-phase circuit of an MMC is illustrated in

Fig. 1 Schematic of per-phase circuit and SM of an MMC. (a) Per-phase circuit of an MMC. (b) SM structure.
By controlling the on-off states of the IGBTs, each SM works in one of the following three states: inserted, bypassed, and blocked. The desired sinusoidal voltage is synthesized by properly controlling the number of SMs inserted and the voltage output by each SM. The output voltage of each bridge arm is equal to the sum of voltages of all SMs in this arm. The capacitor voltages of the SMs in a bridge arm should be kept close to each other, which is realized by the modulation block in the MMC control. The mainstream modulation methods include multi-level carrier-based and nearest-level modulations.
A schematic of the MMC-HVDC transmission system controlled by VC is illustrated in

Fig. 2 Schematic of MMC-HVDC transmission system controlled by VC.
An MMC connected to node can be described with its average model as [
(1) |
where the subscript , and and indicate the nodes and , to which the rectifier-side MMC and inverter-side MMC are connected, respectively; the superscript , and r and i indicate the variables of the rectifier-side MMC and inverter-side MMC, respectively; is the pole-to-pole DC bus voltage of the DC bus; is the current of DC line in the MMC-HVDC transmission system, , , and is the resistance of DC transmission line of the MMC-HVDC system; , is the installed DC bus capacitance, is the SM capacitance, and is the number of phases; is the active power output; is the rated apparent power chosen for the entire power system; and are the d- and q-axis output currents, respectively; is the parasitic arm resistance of MMC; is the arm inductance of MMC; and are the d- and q-axis output voltages, respectively; and are the d- and q-axis components of AC bus voltage, respectively; and is the synchronous speed of the entire system.
The active and reactive power outputs of the MMC and are expressed as:
(2) |
The models describing the dynamics of circulating current, the sum of capacitor voltages, and circulating current controllers are not presented here, which can be found in [
For the rectifier-side MMC, the DC and AC bus voltages are regulated by the outer-loop controllers in a VC, of which the d- and q-axis state equations are expressed as:
(3) |
where and are the d- and q-axis state variables of outer-loop controllers for the rectifier-side MMC, respectively; is the bandwidth of the DC bus voltage integrator; is the bandwidth of the DC bus voltage control loop; the superscript * represent the reference values; and is the integral coefficient of the AC bus voltage controller for the rectifier-side MMC.
The outputs of outer-loop controllers for the rectifier-side MMC are expressed as:
(4) |
where is the proportional coefficient of the AC bus voltage controller for the rectifier-side MMC.
For the inverter-side MMC, the active power output and AC bus voltage are regulated by the outer-loop controllers in a VC, of which the d- and q-axis state equations are expressed as:
(5) |
where and are the d- and q-axis state variables of outer-loop controllers for the inverter-side MMC, respectively; and and are the integral coefficients of the active power and AC bus voltage controllers for the inverter-side MMC, respectively.
The outputs of outer-loop controllers for the inverter-side MMC are expressed as:
(6) |
where and are the proportional coefficients of the active power and AC bus voltage controllers for the inverter-side MMC, respectively.
The inner-loop current controllers in a VC for the rectifier- and inverter-side MMCs share the same structure, so the state equations and outputs of the inner-loop current controllers are similar.
The state equations of inner-loop current controllers can be expressed as:
(7) |
where and are the d- and q-axis state variables of inner-loop current controllers, respectively; and and are the d- and q-axis integral coefficients of innner-loop current controllers, respectively.
The outputs of inner-loop current controllers can be expressed as:
(8) |
where and are the d- and q-axis proportional coefficients of the inner-loop current controllers, respectively.
By mimicking the four-loop structure of the VC, an FRTHC is designed and applied for the control of rectifier-side and inverter-side MMCs. A schematic of an FRTHC is illustrated in

Fig. 3 Schematic of MMC-HVDC transmission system controlled by FRTHC.
In each control loop of the FRTHC, two cascading SCUs are configured, i.e., an outer-loop SCU and an inner-loop SCU. A BBFC with neutral output is employed in each SCU.
BBFC was first proposed in [
The d-axis frame is aligned to the AC bus voltage vector, which is realized by the phase-locked loop (PLL), so we have and . Therefore, (2) can be rewritten as:
(9) |
Hence, the relationship between and , as well as and , is described with algebraic equations. Moreover, according to the last two differential equations in (1), it can be observed that the relationship between and , as well as and , is described with the first-order differential equations. According to the above analysis, the first-order BBFCs can be utilized in SCUs, as shown in
The control logic of a BBFC with neutral output is expressed as:
(10) |
where is the output of control logic of the first-order BBFC; is the tracking error of output variable ; is the value of at the previous sampling interval; and are the upper and lower bounds of the tracking error, respectively; and the symbols and represent the logic operations of “or” and “and”, respectively.
If and are negatively correlated, a sufficiently large positive value of will drive a positive to be smaller. According to the output of control logic, the control signal generated by the BBFC is expressed as:
(11) |
where is the steady-state value of at equilibrium; and and are the positive and negative maximum outputs of the designed BBFC, respectively.
If and are positively correlated, a sufficiently large positive value of drives a positive to be larger. According to the output of control logic, the control signal generated by the BBFC is expressed as:
(12) |
The first-order nonlinear system can be defined as:
(13) |
where is the state vector; and and are the piecewise right-continuous functions. If the conditions in (14) are satisfied, can always be driven into by the first-order BBFC defined in (10)-(12) [
(14) |
An outer-loop SCU and an inner-loop SCU connected in a cascading manner are employed for the DC bus voltage control loop of the rectifier-side MMC in the FRTHC. The control logic of the BBFC in the outer-loop SCU for the DC bus voltage control is expressed as:
(15) |
where ; and the subscript represents the variables in the outer-loop SCU for the DC bus voltage control.
For the inverter-side MMC, two cascading SCUs for controlling its active power output comprise an outer-loop SCU and an inner-loop SCU. The control logic of the BBFC in the outer-loop SCU for the active power control is expressed as:
(16) |
where ; and the subscript represents the variables in the outer-loop SCU for the active power control.
Because is negatively correlated with and is negatively correlated with , the outputs of BBFCs in the outer-loop SCU for the DC bus voltage control and active power control share the same form, which can be written as:
(17) |
where the superscript 0 represents the steady-state value that can be calculated at the equilibrium.
Regarding the BBFCs in the inner-loop SCUs for the DC bus voltage control loop of the rectifier-side MMC and active power control loop of the inverter-side MMC, the control logics can be expressed as:
(18) |
where and the subscripts and represent the variables in the inner-loop SCUs for the DC bus voltage control of rectifier-side MMC and active power control of inverter-side MMC, respectively.
Because and are positively correlated, the outputs of BBFCs in the inner-loop SCUs for the DC bus voltage control and active power control can be expressed as:
(19) |
With respect to the AC bus voltage control loops of the rectifier-side MMC and inverter-side MMC in FRTHC, an outer-loop SCU and an inner-loop SCU connected in a cascading manner are utilized as well. The control logics of the BBFCs in the outer-loop SCUs for the AC bus voltage control are expressed as:
(20) |
where and the subscripts and represent the varibles in the out-loop SCUs for the AC bus voltage control of rectifier-side MMC and inverter-side MMC, respectively.
Because and are negatively correlated, the outputs of BBFCs in the outer-loop SCUs for the AC bus voltage control can be expressed as:
(21) |
The control logics of the BBFC in the inner-loop SCUs for the AC bus voltage control can be expressed as:
(22) |
where the subscript represents the variables in the inner-loop SCUs for the AC bus voltage control of rectifier-side MMC and inverter-side MMC.
Because and are positively correlated, the outputs of BBFCs in the inner-loop SCUs for the AC bus voltage control can be expressed as:
(23) |
The switching laws designed for each SCU in the four control loops of the FRTHC offer the following performances. In cases where the magnitude of the tracking error of an output variable overrides a threshold value for a specified length of time, the BBFC in the corresponding control loop is switched on and generates bang-bang control signals. In cases where the magnitude of the tracking error of an output variable remains within a pre-designed interval for a selected length of time, the PI control loop is switched on and generates continuous control signals for asymptotical convergence of the tracking error. To realize the above performance, a state-dependent switching law, as illustrated in

Fig. 4 Schematic of switching law designed for SCUs of FRTHC. (a) Disturbance indicator. (b) Switching signal generator.
The switching law comprises two parts, i.e., a disturbance indicator and switching signal generator. In the disturbance indicator, represents the absolute value of the tracking error of the control objective , i.e., , , , and for outer-loop controllers, and , , , and for inner-loop controllers; is the threshold value, and it indicates a disturbance occurs when overrides and it is generally set as half the width of the desired error interval, i.e., ; is the gain to adjust the triggering speed of the BBFC in an SCU, which is usually selected from 1 to 100 according to the practical situation; and is generally selected as half of . The comparator outputs 1 when input A is larger than input B. The clearing port of the integrator inputs and the integrator output is reset to be 0 when is smaller than . DBlk denotes the blocking signal of the MMC, and MMC is blocked when . indicates that lasts longer than , and works in a coordinated manner with .
In the switching signal generator, the JK flip-flop module generates when a step-up signal of is sensed by clearing port C and the initial value of is zero. When , the integrator of the switching signal generator is reset to be 0 and . When changes from 1 to 0, the output of the integrator begins to increase. Until the output of the integrator overrides , . According to the value of , the control signals generated for the corresponding SCU are expressed as:
(24) |
where and are the outputs of the corresponding PI control loop and BBFC, respectively.
According to the above, the outputs of the SCUs of the FRTHC are expressed as:
(25) |
where the superscripts “”, “”, and “” represent the control signals generated by SCUs, BBFCs, and PI controllers, respectively.
To test the performance of an MMC-HVDC transmission system controlled by FRTHC, the simulation studies are conducted in a two-machine test power system with PSCAD and a four-machine test power system with MATLAB, respectively.
The layout of a two-machine test power system is illustrated in

Fig. 5 A two-machine test power system with MMC-HVDC transmission system.
The parameters of the MMC-HVDC transmission system are selected as: Hz, , , MVA, kV, , , and mH, where is the equivalent arm capacity of MMC. To evaluate the performance of the FRTHC, the simulation results of the test power system controlled by a single VC and a VC with DC voltage droop control (VDRC) are presented for comparison. The voltage droop control can adjust the reference power according to the DC voltage sag in real time, to stabilize DC-side voltage of the MMC [
The parameters of BBFCs and the switching laws of SCUs in the FRTHC of the rectifier-side and inverter-side MMCs are presented in
Parameter | Different values with different control objectives | |||
---|---|---|---|---|
loop | loop | loop | loop | |
(p.u.) | ||||
(p.u.) | ||||
(p.u.) | ||||
(p.u.) | ||||
(s) | ||||
(s) | ||||
(p.u.) | ||||
(p.u.) |
Parameter | Different values with different control objectives | |||
---|---|---|---|---|
loop | loop | loop | loop | |
(p.u.) | ||||
(p.u.) | ||||
(p.u.) | ||||
(p.u.) | ||||
(s) | ||||
(s) | ||||
(p.u.) | ||||
(p.u.) |
The simulation results obtained in the case where a three-phase-to-ground fault occurs at node 1 are illustrated in

Fig. 6 Fault ride-through performance of MMC-HVDC transmission system controlled by FRTHC, VC, and VDRC under three-phase-to-ground fault. (a) . (b) . (c) . (d) . (e) . (f) . (g) . (h) . (i) . (j) . (k) . (l) . (m) . (n) . (o) . (p) .
At the rectifier side, both BBFCs in the outer-loop SCUs are triggered and generate bang-bang current reference signals for the inner-loop controllers, as illustrated in by
With respect to the inverter-side MMC, BBFCs in SCUs for the d-axis control loop are triggered, as illustrated by the d-axis reference current in
To further test the performance of the FRTHC in asymmetrical fault events, a line-to-line fault is applied at node 2 at s in the test power system illustrated in

Fig. 7 Fault ride-through performance of MMC-HVDC transmission system controlled by FRTHC, VC, and VDRC under line-to-line fault. (a) . (b) . (c) . (d) . (e) . (f) . (g) . (h) . (i) . (j) . (k) . (l) . (m) . (n) . (o) . (p) .
At the inverter side, both BBFCs in the outer-loop SCUs are triggered and generate bang-bang current reference signals for the inner-loop controllers, as shown in
In terms of the rectifier-side MMC, neither the BBFC in the d-axis outer-loop SCU nor the q-axis outer-loop SCU is switched on during the fault. As shown in
Unstable oscillations in the active power output of the inverter-side MMC lead to fluctuations in the DC bus voltage . The current flowing through the DC transmission line oscillates, and the oscillation is transferred to the rectifier-side MMC. Accordingly, unstable oscillations are observed in the DC bus voltage of the rectifier-side MMC controlled by VC and VDRC, as illustrated in
B. Fault Ride-through Performance of an MMC-HVDC Transmission System in Four-machine Thirteen-bus Test Power System
The FRTHC is also tested by the control of an MMC-HVDC transmission system in a four-machine thirteen-bus test power system with MATLAB, the schematic of which is shown in

Fig. 8 A four-machine test power system with MMC-HVDC transmission system.
The parameters of synchronous generators (SGs) and the network can be found in [
The parameters of the BBFCs and switching laws of SCUs in the FRTHC of the inverter-side MMC and rectifier-side are presented in
Parameter | Different values with different control objectives | |||
---|---|---|---|---|
loop | loop | loop | loop | |
(p.u.) | ||||
(p.u.) | ||||
(p.u.) | ||||
(p.u.) | ||||
(s) | ||||
(s) | ||||
(p.u.) | ||||
(p.u.) |
Parameter | Different values with different control objectives | |||
---|---|---|---|---|
loop | loop | loop | loop | |
(p.u.) | ||||
(p.u.) | ||||
(p.u.) | ||||
(p.u.) | ||||
(s) | ||||
(s) | ||||
(p.u.) | ||||
(p.u.) |

Fig. 9 Dynamics of MMC-HVDC transmission system controlled by FRTHC, VC, and VDRC. (a) . (b) . (c) . (d) . (e) . (f) . (g) . (h) . (i) . (j) . (k) . (l) .
Due to the rectifier-side fault, the BBFCs of the outer-loop SCUs in both the d- and q-axis control loops of the FRTHC for the rectifier-side MMC are switched on. As shown in
With respect to the inverter-side MMC, BBFCs in SCUs are triggered in either the d- or q-axis control loop, and all current and voltage references are generated by PI controllers, as illustrated in
In contrast, the MMC controlled by FRTHC does not exhibit any oscillatory behaviour. Consequently, the active power output and AC bus voltage of the inverter-side MMC controlled by the FRTHC exhibit less oscillation and magnitude deviation than those controlled by VC and VDRC, which is verified by
The above results demonstrate that the dynamics of the inverter-side MMC are closely related to those of the rectifier-side MMC. Although BBFCs at the inverter side are not switched on, the rectifier-side MMC controlled by FRTHC alleviates the imbalance between the power input and output of the MMC-HVDC transmission system. Therefore, the output variables of MMCs controlled by FRTHC exhibit better performance than those controlled by VC and VDRC. Moreover, the entire test power system is prevented from entering the oscillatory region, and no oscillatory modes are excited when the FRTHC is applied.
C. Modal Analysis of Four-machine Test Power System with MMC-HVDC Transmission Line Controlled by VC
The oscillatory modes of the four-machine thirteen-bus test power system with an MMC-HVDC transmission system controlled by VC are analyzed, and the results are presented in
Number | Eigenvalue | Frequency (Hz) | Damping ratio | Participation factor | Relevant variable | Number | Eigenvalue | Frequency (Hz) | Damping ratio | Participation factor | Relevant variable |
---|---|---|---|---|---|---|---|---|---|---|---|
1 | 0 | 1.0000 | 0.5003 | 22 | 0 | 1.0000 | 1.1068 | ||||
2 | 0 | 1.0000 | 1.0712 | 23 | 0 | 1.0000 | 0.5320 | ||||
3 | 0 | 1.0000 | 1.3418 | 24 | 3.3 | 0 | -1.0000 | 0.1819 | |||
4 | 0 | 1.0000 | 0.9929 | 25 | 1.1118 | 0.7512 | 0.5378 | ||||
5 | 0 | 1.0000 | 0.5166 | 26 | 1.1118 | 0.7512 | 0.5378 | ||||
6 | 0 | 1.0000 | 0.5175 | 27 | 1.0827 | 0.0759 | 0.2598 | ||||
7 | 0 | 1.0000 | 2.5411 | 28 | 1.0827 | 0.0759 | 0.2598 | ||||
8 | 0 | 1.0000 | 0.9788 | 29 | 1.1292 | 0.0681 | 0.3042 | ||||
9 | 0 | 1.0000 | 1.7514 | 30 | 1.1292 | 0.0681 | 0.3042 | ||||
10 | 4.7425 | 0.4529 | 0.7029 | 31 | 0.6116 | -0.1141 | 0.2387 | ||||
11 | 4.7425 | 0.4529 | 0.7029 | 32 | 0.6116 | -0.1141 | 0.2387 | ||||
12 | 0.6570 | 0.9901 | 2.4076 | 33 | 0 | 1.0000 | 0.3354 | ||||
13 | 0.6570 | 0.9901 | 2.4076 | 34 | 0 | 1.0000 | 0.3627 | ||||
14 | 0 | 1.0000 | 1.2782 | 35 | 0.2274 | 0.9335 | 0.1661 | ||||
15 | 0.0086 | 1.0000 | 0.3897 | 36 | 0.2274 | 0.9335 | 0.1661 | ||||
16 | 0.0086 | 1.0000 | 0.3897 | 37 | 0 | 1.0000 | 0.2956 | ||||
17 | 0 | 1.0000 | 0.5889 | 38 | 0 | 1.0000 | 0.3399 | ||||
18 | 0 | 1.0000 | 0.8650 | 39 | 0 | 1.0000 | 0.8318 | ||||
19 | 0 | 1.0000 | 0.5787 | 40 | 0 | 1.0000 | 0.5583 | ||||
20 | 0 | 1.0000 | 0.5844 | 41 | 0 | 1.0000 | 0.8127 | ||||
21 | 0 | 1.0000 | 0.5606 | 42 | 0 | 1.0000 | 0.6458 |
According to the participation factor of the state variables, the relevant state variables corresponding to the unstable modes are and . Therefore, it can be observed that the MMC-HVDC transmission system controlled by VC fails to provide sufficient damping for the unstable models in and . These unstable models result in divergent oscillations in MMCs controlled by VC. Therefore, the results of the modal analysis agree with the simulation results presented in Section V-C.
This paper proposes an FRTHC to improve the fault ride-through capability of MMC-HVDC transmission systems. According to the simulation results, the following conclusions are obtained.
First, the FRTHC is structurally stable, which means that the constant switching between the BBFC and PI control loops does not exist in each SCU. The switching laws are effective, and measurement noise and impulsive disturbances cannot trigger BBFCs. Second, the tracking errors of output variables are smaller in the system controlled by FRTHC. The BBFC of an SCU is able to employ more control energy from the MMC than a PI control loop. This is beneficial for the rapid dissipation of unbalanced energy in the DC capacitors and SM capacitors of MMCs. Along with the rebalance between the power input and output of the MMCs, a stable operation of the entire MMC-HVDC system is guaranteed, and a more satisfactory dynamic performance is obtained by the FRTHC. Third, the FRTHC prevents the MMC-HVDC transmission system from unstable oscillations. The simulation results reveal that the piecewise constant bang-bang control signals generated by BBFCs do not stimulate any oscillatory modes of the test system. Actually, it can be observed that BBFCs help MMC-HVDC suppress the oscillatory modes of SGs and circumvent the poor damping of PI control loops in SCUs.
The SCU built upon the BBFC with neutral output is a highly flexible control unit, and more combinations and variations are expected in the applications of SCUs for the control of various electric facilities. Control energy exploration in power systems with bang-bang control methods is an attractive topic of research, and the wide-area coordination of distributed control energy can be investigated in the future.
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