Abstract
The fault current level analysis is important for bipolar direct current (DC) grids, which determines the operation and protection requirements. The DC grid topology significantly impacts the current path and then the fault current level of the grid, which makes it possible to limit the fault current by optimizing the grid topology. However, the corresponding discussion in the literature is indigent. Aiming at this point, the impact of grid topology, i.e., the connecting scheme of converters, on the pole-to-ground fault current in bipolar DC grids, is investigated in this paper, and the ground-return-based and metallic-return-based grounding schemes are considered, respectively. Firstly, the decoupled equivalent model in frequency domain for fault current analysis is obtained. Then, the impacts of converters with different distances to the fault point on the fault current can be analyzed according to the high-frequency impedance characteristics. Based on the analysis results, a simplified fault current index (SFCI) is proposed to realize the fast evaluation of impact of grid topology on the fault current level. The SFCI is then applied to evaluate the relative fault current level. Finally, the simulation results validate the model, the analysis method, and the SFCI, which can effectively evaluate the relative fault current level in a direct and fast manner.
THE modular multilevel converter (MMC) with high voltage and large capacity has become the primary choice in practical high-voltage direct current (HVDC) projects [
Conventionally, symmetric monopole configuration is more popular for the DC grids due to simplicity and relatively low cost. Thus, the analysis, calculation, and limitation of fault current in symmetric monopole DC grids are widely discussed in the literature. For example, an approximated analytical model for pole-to-ground fault calculation in symmetrical monopole DC grids is presented in [
With the ascending demand for reliability and flexibility, the bipolar configuration of DC grids emerges [
Notably, most of the discussion on fault current in bipolar DC grids focuses on the pole-to-pole fault. Although the pole-to-pole fault is usually the most severe for bipolar DC grids, the most frequent fault is pole-to-ground fault. It could also sharply increase the instantaneous current and should be carefully addressed for the DC grid security [
In addition to the fault current calculation, the fault current limitation measurements in bipolar DC grids are also important. Accordingly, the thyristor-based DC fault current limiter with inductor inserting-bypassing capability [
In light of the above, this paper will discuss the impact of grid topology on the pole-to-ground fault current in bipolar DC grids. More specifically, the mechanism of the impact and the simplified evaluation method of grid fault current level will be addressed. The rest of the paper is organized as follows. Firstly, the impact of the grid topology on the fault current in bipolar DC grids with ground returns is investigated in Section II, and the simplified index for relative fault current evaluation is proposed. Then, the impact of the grid topology on the fault current in bipolar DC grids with metallic returns is addressed in Section III with the simplified index to evaluate the relative fault current level. Section IV validates the analysis methods and the proposed evaluation indices through simulation. Finally, concluding remarks are given in Section V.
For a DC pole-to-ground fault, the path of the fault current is from the grounding point to the fault point. Thus, the grounding schemes of DC grids significantly affect the pole-to-ground fault currents. The grounding schemes of DC grids consist of ground-return-based and metallic-return-based grounding schemes. When the DC grid is with metallic returns, the grounding points of all the converters are connected by the metallic wires, and only one grounding point is required. As for the ground-return-based grounding scheme, there is no metallic wire to connect all the converters. Thus, each converter should have an independent grounding point.
As the grounding schemes impact the fault current in different ways, the topology impact mechanism will be discussed separately with respect to different grounding schemes. Notably, topology in this paper represents the connection of converters on the DC side, i.e., the distribution of DC lines. The DC grids with ground returns will be focused in this section, while the DC grids with metallic returns will be addressed in Section III.
The configuration of a bipolar DC grid with ground returns is shown in

Fig. 1 Configuration of bipolar DC grid with ground returns. (a) Ground-return-based grounding scheme in four-terminal DC grid. (b) Typical bipolar MMC and DC line with pole-to-ground fault. (c) MMCp and DC line with pole-to-ground fault.
The configuration of the ground-return-based grounding scheme in a four-terminal DC grid is shown in
After a pole-to-ground fault, the fault DC line should be isolated by DC circuit breakers within several milliseconds (1-3 ms in current projects, and 3 ms is considered in this paper) to guarantee the global security. During this short period, the fault current is mainly contributed by the discharge of the capacitors in the SMs [

Fig. 2 Decoupled equivalent RLC model of MMC and faulty DC line for pole-to-ground fault analysis.
The fault current is formed by two components, i.e., steady-state component and fault component (I0 and If in
(1) |
(2) |
where , , and are the capacitance, reactance, and resistance of an SM, respectively.
Notably, as mentioned above, the steady-state component of the fault current is largely impacted by the control strategies and parameters. Nevertheless, the fault component is barely affected by the controllers, of which the response time is generally above dozens of milliseconds, e.g., the voltage controller, the phase-locked loop (PLL), and the current controller. Thus, the impact of different control strategies and parameters on the fault current is not considered in this paper. As for the valve or SM controllers, they may significantly vary the fault current path, and then the fault current may be impacted, which is, however, out of the scope of this paper.
Based on the decoupled equivalent model, the steady-state and fault components of the fault current can be analyzed independently. Then, the fault component is focused in the current and following subsections. Moreover, unless specified, the fault current in this paper indicates the fault component.
As indicated in [

Fig. 3 Chained DC grid for analysis of impact of grid topology on fault current.
The fault current varies when the equivalent impedance from the sources to the fault point changes. Thus, the converters can be classified according to their location with respect to the fault point. In this paper, we define the converters directly connected to the fault point as adjacent converters (e.g., Converter 1 in
(3) |
where the symbol “” denotes the paralleling of impedance.
To theoretically investigate the impact, the high-frequency equivalent impedance analysis method is applied [
To compare the equivalent impedances of the sets consisting of different types of converters, a case study is conducted in the DC grid, as shown in
Lm (mH) | Rm (Ω) | CSM (mF) | Ln (mH) | Ld (mH) | R0(Ω) | L0 (mH) | N | Udc (kV) |
---|---|---|---|---|---|---|---|---|
50 | 0.27 | 15 | 300 | 150 | 1.98 | 164 | 200 | ±400 |
Based on (3), the equivalent sum impedance of DC grids in

Fig. 4 Equivalent sum impedance of DC grids in Fig. 3 with ground returns and different numbers of converters.
It should be noted that the DC lines contribute to the equivalent sum impedance of the system as well, as shown in
C. Simplified Fault Current Index for Fast Fault Current Level Evaluation in DC Grid with Ground Returns
Although the fault current can be analytically calculated based on the state space model, the calculation requires burdensome computation, especially when the number of converters increases. Thus, the state space model is not cost-effective and computation-efficient to be adopted for the analysis of the impact of grid topology on the fault current level, i.e., the maximum fault current value of the DC grid. To tackle this issue, a simplified index that can evaluate the relative fault current levels of different DC grids in a simple and fast way is required. According to the previous analysis, the pole-to-ground fault current in the DC grid with ground returns is mainly impacted by the adjacent and sub-adjacent converters. Then, the distant converters and connecting lines can be ignored in such a case, as shown in

Fig. 5 Simplified equivalent model of a DC grid considering only adjacent and sub-adjacent converters and corresponding DC lines for pole-to-ground fault analysis.
When a pole-to-ground fault occurs on line ij, the equivalent impedance from the fault point to node i, defined as Zfij, can be obtained from
(4) |
where Zi0 is the impedance from node i to the fault point; Zix is the equivalent impedance of the line connecting nodes i and x; and the rest parameters are defined in the same manner.
Note that the inductance impedance is usually much higher than the resistance and capacitance impedances in high-frequency domain, as shown in

Fig. 6 Magnitudes of resistance, inductance, and capacitance impedances in frequency domain.
Thus, the impedances in (4) can be replaced by the inductances for simplification, which obtains the fault current in time domain as:
(5) |
where is the parallel equivalent inductance of the adjacent converters and the sub-adjacent converters as well as the connecting lines. It should be noted that (5) is obtained by considering only the adjacent and sub-adjacent converters in the fault current analysis, which is viable according to previous analysis. In such a case, in (5) consists of only the arm inductance of the adjacent and sub-adjacent converters and the line inductances between the two types of converters. Thus, can be used for the fault current analysis in the early fault stage, e.g., within 3 ms after the fault. In the early stage, the fault current rising trend is approximately linear. Moreover, the closer the concerned time point is to the fault time, the more accurate the fault current characteristics are according to (5).
Considering that the fault current is conversely proportional to the impedance, the relative fault current levels of different DC grids can be evaluated by comparing their equivalent sum impedances. As the maximum fault current usually appears at the converter terminal on a DC line, in (5) can be ignored.
Then, the simplified fault current index (SFCI) of DC grid with ground returns (SFCI-G) is defined as:
(6) |
For a DC grid with m lines, a total of 2m SFCI-G values should be calculated to obtain the maximum fault current with this topology. Then, the maximum SFCI-G (indicated as SFCI-) can be used to represent the fault current level of this topology, which can be further used for DC grid topology design and optimization in terms of fault current limitation. Notably, SFCI-G is not the numerical fault current. Instead, it is used to evaluate the possible maximum fault current for a DC grid with certain topology and certain fault point.
It can be observed in (6) that only the topology of the DC grid, steady-state parameters, and the fault point location should be given in the calculation of SFCI, where the iterative calculation is avoided.
The metallic return scheme is another basic grounding scheme for bipolar DC grid. A typical four-terminal bipolar DC grid with metallic returns is shown in

Fig. 7 Typical four-terminal bipolar DC grid with metallic returns.
Different from the DC grid with ground returns, the DC grid with metallic returns cannot be analyzed by directly aggregating the equivalent impedances of converters, as they are not physically in parallel due to the impedances of the metallic wires. Instead, the DC grid equivalent model should be transformed before the fault current analysis. Specifically, three transformation processes are required, which will be exemplified in a four-terminal DC grid as shown in

Fig. 8 Model transformation of bipolar DC grid with metallic returns. (a) Full model with two poles. (b) Model ignoring healthy pole. (c) Model in general radial configuration. (d) Model after decoupling common grounding point.
In a DC grid with metallic returns, the impedances of the metallic wires are much smaller than the sum of the healthy pole converters. As a result, there is almost no fault current flows through the healthy pole. Then, the fault current is almost provided by the fault pole converter, while the healthy pole converter does not contribute to the fault current. Additionally, although in a pole-to-ground fault, the healthy pole will be disturbed by the fault current, the amplitude of the disturbance current is negligible, and the sum of the disturbance current is zero. Thus, the healthy pole does not affect the fault pole in turn. Without consideration of the impact of the healthy pole, the model of the DC grid with metallic returns shown in
To analyze the fault current more efficiently, the meshed grid shown in
When focusing on the fault currents flow through the converters to the grounding point, the common grounding point can be decoupled. Then, the grounding path of each converter becomes an independent loop from the converter to the decoupled grounding point via an equivalent impedance, as shown in
(7) |
(8) |
Then, the inductance Leqgi from the
(9) |
Notably, Reqg and Leqg consist of the arm resistance and arm inductance, respectively, while the converters in Fig. are presented for illustration only. The equivalent resistance Reqgi in
B. Topology Impact Analysis of DC Grid with Metallic Returns Based on High-frequency Equivalent Impedance
Based on the transformed model, as shown in

Fig. 9 Equivalent sum impedances of DC grids in Fig. 3 with metallic returns and different numbers of converters.
Then, the additional equivalent impedances distinguish the equivalent sum impedances corresponding to different converter connection schemes.
C. Simplified Fault Current Index for Fast Fault Current Level Evaluation in DC Grid with Metallic Returns
According to the transformed model shown in Fig. , an MMC with metallic return can be analyzed in the same way as the MMC with ground return, while the equivalent sum impedance is increased. Thus, similar to Section II-C, the SFCI for the DC grids with metallic returns (SFCI-M) can be developed to evaluate the relative fault current levels. Referring to
(10) |
where is the parallel equivalent impedance of all the converters in the transformed model.
Then, the fault current in the time domain can be obtained as:
(11) |
Ignoring the resistance and considering that the maximum fault current usually appears at the converter terminal on a DC line, SFCI-M can be defined as:
(12) |
The maximum SFCI-M, i.e., SFCI-, can be used to represent the relative fault current level of this topology, which can be further used for DC grid topology design and optimization. Similar to SFCI-G, 2m SFCI-M values should be calculated to obtain the maximum fault current of a DC grid consisting of m lines with a certain topology.
The high-frequency impedance-based fault current analysis method is validated at first. A meshed five-terminal DC grid, whose topology is shown in

Fig. 10 Topology of a meshed five-terminal DC grid.

Fig. 11 Calculation and simulation results of fault current when DC grid is with ground or metallic returns. (a) Ground returns. (b) Metallic returns.
To verify the analysis results about the impact of grid topology on the fault current characteristic, a chained DC grid is tested in PSCAD/EMTDC, as shown in

Fig. 12 Schematic diagram of chained DC grid for topology impact mechanism verification.
First, only two of the converters are connected (Converters 1 and 2), referring to Case 1. Then, one more converter (Converter 3) is connected to Converter 2, referring to Case 2. The fourth converter (Converter 4) is then connected to Converter 3 in Case 3. Finally, the fifth converter (Converter 5) is connected to Converter 4 in Case 4. A pole-to-ground fault is triggered at the midpoint of the DC line connecting Converters 1 and 2 at s. The fault currents that last for 3 ms in the DC grid with different topology cases are shown in

Fig. 13 Fault currents in DC grid with different topology cases. (a) Ground returns. (b) Metallic returns.
It can be observed in
To further validate the analysis results, a case study in the five-terminal DC grid, as shown in

Fig. 14 DC voltages of converters in five-terminal DC grid with ground or metallic returns. (a) Ground returns. (b) Metallic returns.
According to the analysis results, from the perspective of pole-to-ground fault current limitation, the metallic return-based grounding scheme is preferable for the DC grid with less converters, which can effectively increase the equivalent impedance of the DC grid to suppress the fault current. However, when DC grid is expanded to a relatively large extent with more converters, the ground-return-based grounding scheme may be more proper, where the distant converters will scarcely contribute to the fault current.
The validation of the proposed SFCI, including SFCI-G and SFCI-M, is then carried out. The simulation is also conducted in the five-terminal DC grid as shown in

Fig. 15 Pole-to-ground fault current simulation results compared with calculated SFCI when DC grid is with ground or metallic returns. (a) Ground returns. (b) Metallic returns.
As can be observed from
The simplified indices are further applied to screen the DC grid topologies in terms of fault current level evaluation, where the grounding and metallic return schemes are considered, respectively. The fault current level of the DC grid is defined as the highest fault current value that the system can reach, i.e., the fault current of the worst fault point. In this case study, the midpoints of DC lines are selected as the fault points to observe the fault current characteristics. The fault point (one of the midpoints of the DC lines) with the largest fault current is identified as the worst fault point.
It should be mentioned that the pre-fault condition of the DC grid is that the power output of all the converters is set to be zero, i.e., there is no power flow in the DC grid in steady state. This precondition has been proven to be reasonable for fault current analysis in [
The simulation is conducted in a five-terminal DC grid, and several typical topologies for fault current level evaluation are shown in

Fig. 16 Several typical topologies for fault current level evaluation. (a) Topology 1. (b) Topology 2. (c) Topology 3. (d) Topology 4. (e) Topology 5.

Fig. 17 Pole-to-ground fault current simulation results compared with calculated SFCI when DC grids of different topologies are with ground or metallic returns. (a) Ground returns. (b) Metallic returns.
The results corresponding to the DC grids with metallic returns shown in
The impact of grid topology on pole-to-ground fault current and its fast evaluation method in bipolar DC grids are addressed in this paper, where the ground-return-based and metallic-return-based grounding schemes are considered, respectively. The conclusion of this paper is summarized as follows.
1) The proposed high-frequency impedance-based fault current analysis method is accurate, especially when it is used to calculate the current that lasts for 3 ms after fault. Moreover, the SFCI can effectively evaluate the relative fault current levels of DC grids with different topologies. The cumbersome computation is avoided in such an evaluation method, based on which the fault current level can be assessed directly and rapidly.
2) The DC grid topology largely impacts the pole-to-ground fault current, while the impact mechanisms of the DC grids with ground and metallic returns are different. In the DC grid with ground returns, the fault current is mainly affected by the adjacent and sub-adjacent converters. In the DC grid with metallic returns, all the converters, including the distant converters, contribute to the fault current at an approximately average level.
3) Based on the proposed SFCI, it has been found that the loop topology is usually with the lowest fault current level, while the radial topology obtains the highest. In the future, the proposed analysis method and simplified indices will be used to optimize the DC grid topology with respect to fault current limitation.
Appendix
The details of Transformation 2 in Fig. 8 and derivation of (9) are given as follows.

Fig. A1 Equivalent model of metallic returns of four-node DC grid. (a) Before transformation. (b) After transformation.
A four-node DC grid before transformation is shown in Fig. A1(a), where Zij is the real impedance between nodes i and j; and is the transfer impedance from nodes n to m.
The transfer impedance from node 1 to node 2, i.e., , can be obtained as:
(A1) |
The rest can be done in the same manner, yielding:
(A2) |
(A3) |
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