Journal of Modern Power Systems and Clean Energy

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Small-signal Model for Dual-active-bridge Converter Considering Total Elimination of Reactive Current  PDF

  • Juan Ramon Rodriguez-Rodriguez
  • Nadia Maria Salgado-Herrera (Member, IEEE)
  • Jacinto Torres-Jimenez
  • Nestor Gonzalez-Cabrera (Member, IEEE)
  • David Granados-Lieberman
  • Martin Valtierra-Rodriguez
Universidad Nacional Autónoma de Mexico, Facultad de Ingeniería, Depto. Energía Electrica. Av. Universidad 3000, Col. UNAM CU, Coyoacán, CDMX, Mexico; Instituto de Energías Renovables, Universidad Nacional Autónoma de Mexico, Priv. Xochicalco s/n, Col. Centro, Temixco, Morelos, Mexico; Instituto Tecnológico Superior de Irapuato, Carretera Irapuato-Silao km 12.5. Irapuato, Guanajuato, Mexico; Universidad Autónoma de Querétaro, Campus San Juan del Rio, Rio Moctezuma 249, San Juan del Río, Querétaro, Mexico

Updated:2021-03-16

DOI:10.35833/MPCE.2018.000911

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Abstract

Emerging technologies such as electric vehicles, solid-state transformers, and DC transformers are implemented using the closed-loop bi-directional dual-active-bridge (DAB) converter. In this context, it is necessary to have average models that provide an efficient way of tuning the proportional integral (PI) compensator parameters for large- and small-signal applications. We present a novel small-signal model (SSM) for DAB converter with a single closed-loop PI controller and the total elimination of reactive current (IQ=0). The method applies a modulation technique for IQ=0 and introduces a composite function in the controller while reducing the original non-linear switching model, which allows to decrease the order of the transfer function and analyze the closed-loop operation. The proposed SSM is analyzed using different response time, load, and DC voltage changes. The simulation and experimental results demonstrate the ease of implementation and effectiveness of the proposed model with respect to other SSM techniques.

I. Introduction

DUAL-ACTIVE-BRIDGE (DAB) converter is an attractive, modern, and opportune technology for several applications that involve DC-DC conversion stages [

1]. The examples include: ① electric vehicles [2]; ② solid-state transformers or power electronic transformers [3], [4]; ③ DC interconnected grids; ④ small to medium photovoltaic (PV) plants [5].

Figure 1 shows the topology of DAB converter, where both the input and output ports are on an H-bridge structure, H1 and H2, linked together through a high-frequency transformer (HFT). VP and VS are the AC voltages shaped by H1 and H2, which in turn rely on the modulation signals m1 and m2 as well as the DC voltages VDC1 and VDC2, respectively [

6].

Fig. 1 Topology and applications of DAB.

The voltage difference VL between the HFT windings produces a current flow IL dependent upon: the leakage inductance Lh, the parasitic resistance rP, the phase shift carrier φ, and the duty ratio μ between the modulation signals m1 and m2. IDC1 and IDC2 represent the DC currents of the H-bridge converters. PDC1 and PDC2 represent the DC power. More specifically, PDC2 represents the dissipated power in the resistive load RL.

The reactive current IQ appears as negative peak currents in both the port converters IDC1 and IDC2. The elimination of the reactive current, i.e., a reactive current (IQ=0) in DAB converters presents multiple advantages [

7]: ① HFT volume reduction, due to the decrease in the root mean square (RMS) current; ② the lowering of current stress on power semiconductors; ③ the decrease in capacitor value due to IDC2 ripple current reduction. These advantages of high efficiency and high power density have motivated the development of different modulation techniques for DAB converters, which are based on the combination of phase shift Δφ and μ [8], [9].

In [

10], theoretical and experimental studies are performed on three modulation methods for a DAB converter, incorporating different operation modes and production levels of active IA and IQ based on the variation of Δφ and μ. The three modulation methods are: ① single-phase shift carrier (SPSC); ② dual-phase shift carrier (DPSC); ③ proportional values modulation (PVM).

The PVM technique demonstrates advantages over the rest of the modulation methods, as it preserves the bi-directional active power transfer without generating reactive currents for all operation modes. However, small-signal model (SSM) can guarantee the operation of an optimal DAB converter in modern applications, as it proposes a proportional integral (PI) criterion to adjust the parameters of feedback circuit. The following section discusses some of the literature on SSM for DAB converters.

In [

11], an SSM based on an exponential approximation process for DAB converter applications is proposed, in the zero-voltage switching (ZVS) operation mode. In [12], an SSM for an automotive DAB system is proposed, which allows the power transfer between a low-voltage port (11 to 16 V) and a high-voltage port (240 to 450 V). Although this system implements the SPSC modulation where IQ>0, the final results between the original switched model and the reduced model are satisfactory. However, it requires two PI feedback loops and two control devices: a digital signal processing (DSP) and a field programmable gate array (FPGA) hindering the system implementation. The SPSC modulation is again used in [13] to realize an SSM that uses the switching frequency components in the Fourier series of state variables to better capture the effects of AC transformer currents on the converter dynamics.

In [

14], an SSM with a simple mathematical analysis is presented as it only considers the ZVS operation zones. An SSM of a closed-loop control design with a naturally commutated and bi-directional current flow is presented in [15]. Current fed dual active bridge (CFDAB) generates soft-switching states based on different switching frequencies. However, this technique also does not eliminate IQ and requires two PI feedback loops for the voltage and current.

In [

16], the linearization is performed on the DAB converter, applying the Taylor series based on SPSC modulation, where the characteristic of IQ=0 is not considered. The operation of closed-loop converter is also not considered for power step changes in the output voltage reference. With the power of 0.1 kW, the open-loop laboratory prototype demonstrates similar results when making step changes in Δφ.

The SSM for two DAB converters operating in parallel is presented in [

17], where one converter operates with hard switching based on SPSC modulation, and the other under resonant switching LLC-ZVS. The linearization process is performed through the Fourier series. Though the experimental results of the method are acceptable, the implementation requires extra circuitry, i.e., extra switches and transformers. These disadvantages make the DC/DC topology less economically feasible for practical applications.

In [

18], the first harmonic approximation (FHA) method is improved to construct an accurate large-signal model for SPSC modulation. Generalized average modeling is used to decompose the first harmonic of transformer current into orthogonal components. This paper presents a highly technical mathematical analysis. However, we neither consider the converter in closed-loop operation, nor perform time response analysis, the analysis of load steps, or the changes in the output voltage.

Applying SPSC modulation again in [

19], the stability analysis of DAB converter is performed, where the exposed experiments show static operation points for different compensator gain values. While demonstrating the analytical stability limits, this paper does not investigate other factors such as the change of load, different steps of the reference voltage, or the converter input voltage variations, thus limiting the effectiveness of the study.

In [

20], a tuning method for PI using the Ziegler-Nichols technique is proposed, where the parameters obtained from the plant step response are considered. However, the paper fails to establish a stable analytical relationship between the DAB plant model and the PI parameters.

A three-phase DAB configuration is discussed in [

21]. Due to the topological structure of the converter, the variations in magnitude and phase generate different operation zones. An SSM of a three-phase converter [22] cannot represent a single-phase DAB.

The above studies do not consider the total reactive power elimination attached to a simple feedback. We propose an SSM based on the PVM technique to eliminate reactive power in the DAB converter [

10]. Also, a simple closed-loop system based on one PI compensator is proposed, which helps realize a control and modulation system with a few mathematical operation.

This rest of the paper is organized as follows. In Section II, the non-linear switching model is introduced. Average models as well as the process for obtaining the closed-loop SSM based on the PVM, are given in Section III. In Section IV, the simulations and comparative models are introduced. In Section V, the experimental results are presented. And Section VI draws the conclusion.

II. Non-linear Switching Model of DAB

The switching states are considered to perform a closed-loop dynamic analysis of DAB, which helps to obtain an operation model based on independent voltage and current sources. The PVM technique analyzes the DAB as a constant DC at both VDC1 and VDC2 ports with the transformation ratio coefficient α. α is defined as the ratio of the turn number at the primary to the turn number at the secondary NP and NS of HFT, that is:

α=NSNP=VDC2VDC1 (1)

According to (1), the performance of the PVM technique depends upon the topological states of IL.

For IQ=0, the PVM must follow the basic rule, i.e., to equalize the charged voltage per second of charged flowing through IL to the discharged voltage per second. Table I shows that the commutation functions S1i and S3i for each H-bridge module are defined. S0,1 is for the commutation state, and i1,2 is for the number of H-bridges, where the complementary pulses can be defined by S2i=S¯1i and S4i=S¯3i.

TABLE I Commutation Functions for H-bridge Control
S1iS3iVPIDC1
1 0 VDCi IL
1 1 0 0
0 0 0 0
0 1 -VDCi -IL

Using Table I and considering three-voltage levels, VP and VS relations are:

VP=S11-S31VDC1m1VDC1 (2)
VS=S12-S32VDC2m2VDC2 (3)

IL in the inductance L of HFT is given by:

ILt=1TcLh0ΔφVLdt+IL° (4)

where IL° is the initial condition for IL; and Tc is the switching frequency period. Based on (1), VL is defined as:

VL=VP-VS/α (5)

The currents flowing through the DC converter terminals are:

IDC1=m1IL (6)
IDC2=m2IL/α (7)
IRL=VDC2/RL (8)

For the DAB converter, Fig. 2 depicts the obtained equivalent circuit with Lh, which is based on the voltage and current dependent sources. The objective of the obtained equivalent circuit is to model the equivalent operation of the semi-conductor devices.

Fig. 2 Equivalent circuit of DAB converter.

Based on the equivalent circuit of DAB converter, the time domain voltage and current equations are:

ddtILt=m1(t)LhVDC1t-m2tαLhVDC2t-rpLhILt (9)
ddtVDC2t=m2(t)αCILt-1RLCVDC2t (10)

The differential equation in (9) describes IL on the high-frequency AC side of the DAB converter, while (10) describes VDC2 model of the DC port. Using (9) and (10), we obtain a transfer function in the frequency domain of each DC and AC circuit as a precursive step towards developing a full model of the converter plant.

A. Plant Model in DAB Scheme

By solving AC part in (9) for the DAB converter model and then applying Laplace transform, IL can be written as:

ILs=VL(s)sLh+rP=VPs-Vss/αsLh+rP (11)

By substituting (2) and (3) into (11), IL can be re-written as:

ILs=m1sVDC1-m2sVDC2s/αsLh+rP (12)

Similarly, by solving the DC part of the DAB model, the stored energy in the capacitor WDC2 is given by:

WDC2=12CVDC22 (13)

where WDC2 depends on the difference between the injected power at the capacitor input PDC2 and the power at its output PDC2'. The power difference is given by:

ddtWDC2t=12CVDC22=PDC2-PDC2' (14)
PDC2=IDC2VDC2 (15)
PDC2'=VDC22RL (16)

By substituting (15) and (16) into (14), and then solving VDC2 in Laplace domain, we have:

VDC2s=IDC2(t)sC+1RL=m2sILs/αsC+1RL (17)

Equation (12) expresses ILs as a function of the differential voltage in the transformer dispersion inductance, i.e., it represents the AC part of the DAB converter, while (17) represents its DC counterpart. The implemented control rules and the PVM operation are included to represent the complete model, as shown in Section II-B.

B. Technique of PVM

Table I shows the switching pulse obtained by feeding m1 and m2 into a modulation section using pulse width modulation (PWM) technique. The resulting modulation technique is PVM. The modulation method for the reactive current elimination is presented in Fig. 3, where the relationship between the DC converter current IDC2 and the average current IAV is plotted. The applied voltage to the dispersion inductance is denoted as VL, and the corresponding current is denoted as IL.

Fig. 3 Main value of VL, IL, IDC2 and IAV for PVM.

The topological control states can be used to exhibit the advantages of PVM over the methods of SPSC and DPSC. These advantages are the IQ elimination through the DAB power range and the current stress reduction on semiconductor devices. According to [

10], the main difference among PVM, SPSC, and DPSC techniques is the proportional variation of μ with respect to phase shift variable Δφ.

IDC2 and IAV are also depicted in Fig. 3. Due to the short step time of VL in the leakage impedance L-rP of the HFT, IL generates current ramps during the transitions. Finally, a trapezoidal waveform is generated, proportional to Δφ, as shown in Fig. 3. As can be seen, IDC2 is free of negative components and IAV is always greater than zero during the entire phase shift. Specifically, the mean value of IDC2 is equal to the value of the IAV. It is considered that IDC2IAV. From Fig. 3, it can be seen that only the interval from zero to the maximum generation point is used to establish a maximum limit on Δφ of π/3.

The average IDC2 is given as:

IDC2=IAVΔφ=VDC12π2FcLhαπΔφ-34Δφ2       0<Δφ<π3VDC12π2FcLhαΔφ-π2               π3<Δφ<π (18)

where Fc is the switching frequency. The process necessary to obtain (18) is described in [

10].

C. PI Compensator

The external feedback loop is implemented using VDC2,ref as a constant reference to control the output of DC-bus voltage. This scheme maintains voltage regulation of VDC2 for a wide range of load values using a single PI, giving u as the output of the PI compensator of the form:

u=Vekds=VDC2,ref-VDC2kpss+kikp (19)

where Ve is the error voltage; kp is the proportional gain of kds; and ki is the integral gain of kds.

Finally, between the output variable of the PI compensator and Δφ required in the modulation system, it is possible to propose a new intermediate function f(u), which is useful in the linearization process of the complete converter scheme defined in Section III.

D. Instantaneous Control Structure of DAB

The control structure is implemented using (12), (17) and (19), generating a non-linear system. This scheme is built considering the dynamic characteristics of the instantaneous voltages and currents within the DAB converter.

The control structure shown in Fig. 4 is implemented by generating a non-linear system, which cannot be analyzed using the Laplace domain. Therefore, an average model of linear system will be considered in the next section.

Fig. 4 Controller and plant model for DAB converter using PVM.

III. Average Control Structure of DAB

This study proposes a replacement of the current generation process IDC2 with the approximation of (18), i.e., IDC2IAVΔφ to eliminate AC switching frequency in all converter variables. In the steady state, VDC2=αVDC1. Therefore, the plant model depicted in Fig. 4 can be remodeled as in Fig. 5. The difference between the plant models of Fig. 4 and Fig. 5 is supported by (18) and Fig. 3(b). In other words, IDC2 in Fig. 4 has been replaced by the current IAVΔφ in Fig. 5. Therefore, the switching frequency of AC and the non-linearity of the model are eliminated, preserving the basic converter characteristics in a steady state. In this way, the average values of VDC2 and IDC2 are the same in both models.

Fig. 5 Controller and plant for average DAB converter model using PVM.

Equation (20) describes the mathematical open-loop model for the plant denoted as l(s) and depicted in Fig. 6. It is observed that l(s) is a transfer function that relates the error Ve to the output of the VDC2:

ls=KdsfuIAVΔφKvs (20)

Fig. 6 Controller and plant for reduction of average DAB converter.

From (18), it is considered that IDC2IAV(φ) operates in the range of 0<Δφ<π/3, therefore:

IAVΔφ=VDC12π2FcLhαπΔφ-34φ2 (21)

Under the above assumption, a new equation fu is generated between the compensator output value Kdu and φ, where the objective is to create a directly proportional relationship between u and IDC2,av, which is given by:

Δφ=Kdufu=2π-2π2-3u3 (22)

The compound equation IDC2,avIAVfu is achieved by substituting (22) in (21):

IDC2,av=IAVfu=VDC12π2FcLhαπ2π-2π2-3u3-342π-2π2-3u32 (23)
IDC2,av=IAVfu=VDC12π2FcLhαu (24)

Equation (24) gives IDC2,av as directly proportional to u, thus facilitating the converter model free of non-linearities. The converter plant model l(s) is thus reduced, as shown in Fig. 6.

ls is given as:

ls=kps+kikpsVDC12π2FcLhαCs+1CRL (25)

The equation can be further reduced if the following equality is achieved:

kikp=1CRL (26)

Canceling the zero Kd(s) of the compensator with the plant pole Kv(s), (25) is reduced as:

ls=VDC1kp2π2FcLhαsC (27)

The closed-loop equation of the converter is obtained as:

VDC2s=l(s)ls+1=11+2π2FcLhαCVDC1kps (28)

where VDC2s is represented as a first-order equation, which is one of the main contributions in this paper. The response time τ is considered as:

τ=2π2FcLhαCVDC1kp (29)

VDC2s remains as:

VDC2s=11+τs (30)

In (30), τ can be used to control the voltage at the inductor terminals VL. This control action also helps set the flow direction and magnitude of IL, which in turn helps manage the charge and discharge of C. Finally, the switched model of Fig. 4 is represented by a first-order function based on (30), as shown in Fig. 7.

Fig. 7 Controller and plant for reduction of average DAB converter.

The analysis of the transfer function is performed on the optimal values for the compensators kp and ki. It is proposed to use the desired response times, where kp is given as:

kp=2π2FcLhαCτVDC1 (31)

Based on the equalization proposed in (26), ki is given as:

ki=kpCRL (32)

To build a system in (28), the numerical values of the system elements are replaced and corroborated by the simulation results, and discussed in the following section.

IV. Simulation Results

After modeling a transfer function for the dynamics of closed-loop DAB converter and eliminating the switching components and the non-linearities shown in Fig. 3, the simulation is implemented with the following parameter values: PDC2=10  kW, VDC1=100  V, VDC2=1  kV, and the switching frequency is set as 5 kHz. Based on the above parameters, to obtain the power value at the PDC2 port, a 100 Ω resistance is required to obtain an average current IDC2,av=10  A. Next, the inductance value is obtained from (21) to define the value of φ, where the converter operates at full load.

Assume that the phase shift at full load is the intermediate point of the operation range, i.e., Δφ=π/6. Using a switching frequency of 5 kHz, and considering that α=VDC2/VDC1=10, the inductance value considering IDC2,avπ/610 A is given by:

Lh=VDC12π2FcIDC2,avαππ6-34π62 (33)

In this case, the obtained value is Lh=14.58 µH and a parasite resistance rP=0.05  Ω is assigned. Finally, the used capacitance value is C=47 µF, for a voltage ripple with the value of 5%. The desired time response at τ=0.01  s is calculated using (31) and (32), and τ denotes that the elapsed time reaches 63% of the final output value. The values of kp and ki are obtained as 7.19×10-4 and 0.1439, respectively. The closed-loop function given in (23) is a function of τ which generates VDC2s=s/(0.1s+1). In the same way, the PI values are calculated for different response time. The simulation parameters are shown in Table II.

TABLE II Simulation Parameters in DAB Converter for PDC2=10 kW
ParameterValueParameterValue
PDC2 (kW) 10 IDC2,av (A) 10
VDC1 (V) 100 C (µF) 47
VDC2 (V) 1000 rp (Ω) 0.05
RL (Ω) 100 Lh (μH) 14.58
Fc (kHz) 5

Once the parameters are identified, the proposed PI tuning criteria for a DAB converter are applied. This is achieved by considering the operation with the PVM technique and the obtained results with the proposed average model in Fig. 6.

These results are analyzed for a wide range of different steps such as start-up operation, load step changes, and voltage variations at VDC2,ref, which are attached to the waveforms of the operation of DAB converter in the scheme of PVM.

Figure 8(a) and (b) shows the start-up VDC2 responses for τ=0.1  s and τ=0.01  s, respectively. Each of them achieves a growth of 63% of its final value within the established time response, which shows a first-order response. φ, indicated by the green lines in Fig. 8(a) and (b), shows a behavior directly proportional to the output voltage VDC2. Finally, the red lines in Fig. 8(a) and (b) show the output power growth of the converter with a quadratic behavior given by PDC2=VDC22/RL. In Fig. 8(c), the voltage behavior VDC2 is observed during the stable state, showing a voltage ripple of 5% during the same time.

Fig. 8 Simulation results for dynamics of closed-loop DAB converter. (a) Step response for τ=0.1 s. (b) Step response for τ=0.01 s. (c) Wave forms of VDC2, VP, VS, and IL in steady state. (d) Wave forms of VDC2, Δφ, IDC2, and IDC2,mean in steady state. (e) VDC2 and PDC2 for step response, step load, and VDC2,ref change.

Subsequently, Fig. 8(c) shows the trapezoidal current waveform IL generated in the leakage impedance Lh-rP due to (4).

In Fig. 8(d), a voltage ripple of 5% is observed at VDC2 during the stable state. Figure 8(d) shows φ under full load operation (PDC2=10  kW) of converter, and indicates a constant behavior where the final value is a little greater than π/6, which is attributable to the internal loses of the converter. Figure 8(d) shows that IDC2 enters C, which conserves the current values greater than zero without the generation of return currents or reactive currents. Consequently, the main objective of the PVM technique is realized. IDC2,mean shown by the dotted line in Fig. 8(d) is defined by (21) and is the point from which a converter model reduction in the frequency domain is obtained. Figure 8(e) exposes VDC2 and PDC2 for three different continuous changes in the converter operation, showing the start-up process at t=0.01  s for VDC2,ref=900  V. At time t=0.05  s, a load change RL occurs from 160  Ω to 100  Ω, which generates the voltage of post transition undershoot. Then, it is restored after 0.01 s due to the action of system control in the closed loop. The final PDC2 based on the voltage and resistance values ideally increases from 5  kW to 8  kW. Finally, an increase in VDC2,ref from 900 V to 1200 V is made at t=0.01  s, for which VDC2 follows the reference value. Simultaneously, the output PDC2 increases from 8 kW to 14.4 kW. The voltage ripple also increases in the output.

V. Experimental Results

In the experimental bed, a DC source is included as the first converter port. A half-bridge converter–SiC-Mosfet (KIT8020-CRD-8FF1217P-1) is included, which is controlled by the generated pulses in the DSP (TMF320F28335) device. The pulses are programmed using the MATLAB-Simulink® platform, in which the PI feedback loop, the proposed function, and the PVM technique are implemented. Additionally, at the second port, a resistive load is placed, which is connected in parallel with a DC capacitor to filter the DC voltage in the load.

The performance of control scheme is experimentally tested using a scaled-down 10:1 laboratory prototype, with a transformation ratio α=1. To obtain the same results in the prototype, a similar design criterion is applied. The values used for solving (34) are Lh=0.145 mH and rP=0.5  Ω. The parameter values for the prototype are presented in Table III.

TABLE III Experimental Parameters in DAB Converter for PDC2=10 kW
ParameterValueParameterValue
PDC2 (kW) 1000 IDC2,av (A) 10
VDC1 (V) 100 C (µF) 47
VDC2 (V) 100 rp (Ω) 0.05
RL (Ω) 100 Lh (µH) 0.145
Fc (kHz) 5000

Figure 9 shows the experimental results of a closed-loop DAB prototype. The parameter values in Table III are used with a PVM technique. Figure 9(a) shows that DAB converter operates at an average value of 0 V to a maximum voltage of 100 V with a response time τ=0.1  s. The response time taken to reach 63% of the final voltage value is similar to that of the simulation results. In the steady-state operation of the converter, IDC2 tends to decrease until IQ=0. Figure 9(b) shows the same waveforms with τ=0.01  s, where the waveforms show similar responses but with a faster response time than the simulation results. Figure 9(c) presents the operation in a stable state of the DAB converter with VDC2=100  V, PDC2=625  W, and it operates at a switching frequency of 5 kHz. The ripple voltage of approximately 5 V is generated on VDC2. The voltages VP and VS are shown on the oscilloscope channels CH2 and CH3, respectively, which show a separation of phase shift. Finally, the green wave in CH4 shows the trapezoidal IL current generated in the Lh-rP leakage impedance. Figure 9(c) to (d) shows the stable-state operation of the DAB converter. IDC2 and IDC2 related to the input and output DC ports are also presented, respectively.

Fig. 9 Experimental results of closed-loop DAB prototype for τ=0.1 s. (a) Step response of VDC2 and IDC2. (b) Step response of VDC2 and IDC2. (c) Step response of VDC2,  VP,  VS,  and  IL. (d). Step response of VDC2,  IDC1,  IDC2,  and  IL. (e) Step response of VDC2  and  IL. (f) Step response of VDC2  and  IL.

Figure 9(e) shows the response of a load step performed in the converter, where a transient generation in VDC2 is shown. It generates a voltage drop at 0.01 s and tends to recover dynamically until reaching the steady state of 100 V.

It is also observed that during the VDC2 transient, IL tends to increase the compensation of the new energy demand, while preserving the DC output voltage.

Figure 9(f) shows an increase of VDC2,ref from 90 V to 125 V. Slight deviations in the peak currents of IL are presented, which is due to the magnitude differences between the DC ports. The steady-state and dynamic responses are shown by the simulation and the scale experiment of 1:10, using the PVM technique in DAB converter. The similarities are highlighted between the obtained waveforms in the simulations results and the laboratory prototype results. For example, the response time of VDC2  in simulation in Fig. 8(a) is very similar to that obtained in Fig. 9 (a), achieving 63% of the final value at τ=0.1 s.

The minor differences are attributed to the small variances between the ideal constant values of the elements in the simulations and the real ones in the experimental set-up.

VI. Discussion and Conclusion

In the state of the art, the numbers of SSMs for DAB converters is no more than ten. These have been shown with mathematical techniques for different operation types and study cases. The proposed model contemplates an SSM with an elimination of complete reactive current. As future work, it is interesting to generate new SSMs using other modulation techniques with the ability to eliminate reactive power.

The DC-DC DAB converter is considered as a key element for emerging applications in the field of DC power management due to its advantages of energy conversion such as electrical isolation, high input/output voltage ratios, and bi-directional power flow. Eliminating the reactive current in the DAB converters is also achieved to offer multiple advantages such as less current stress.

In this paper, we demonstrate a closed-loop linear model of the DAB converter obtained from the non-linear plant model and a PI compensator. This has been achieved through a new insertion of transfer function integrated between the compensator and plant, which generates a SSM and obtains the operation gains in a closed loop.

The paper provides a solid foundation for future researchers towards the developments of the DAB converter for specific applications.

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